首页 >TC74HC107AF(EL)>规格书列表
| 零件编号 | 下载 订购 | 功能描述/丝印 | 制造商 上传企业 | LOGO |
|---|---|---|---|---|
DualJKflip-flopwithreset;negative-edgetrigger GENERALDESCRIPTION The74HC/HCT107arehigh-speedSi-gateCMOSdevicesandarepincompatiblewithlowpowerSchottkyTTL(LSTTL).TheyarespecifiedincompliancewithJEDECstandardno.7A. The74HC/HCT107aredualnegative-edgetriggeredJK-typeflip-flopsfeaturingindividualJ,K,cloc | PhilipsPhilips Semiconductors 飞利浦荷兰皇家飞利浦 | Philips | ||
DualJKflip-flopwithreset;negative-edgetrigger 1.Generaldescription The74HC107;74HCT107isadualnegativeedgetriggeredJKflip-flopfeaturingindividualJand Kinputs,clock(CP)andreset(R)inputsandcomplementaryQandQoutputs.Theresetisan asynchronousactiveLOWinputandoperatesindependentlyoftheclockinput.TheJ | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | NEXPERIA | ||
DualJKflip-flopwithreset;negative-edgetrigger 1.Generaldescription The74HC107;74HCT107isadualnegativeedgetriggeredJKflip-flopfeaturingindividualJand Kinputs,clock(CP)andreset(R)inputsandcomplementaryQandQoutputs.Theresetisan asynchronousactiveLOWinputandoperatesindependentlyoftheclockinput.TheJ | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | NEXPERIA | ||
DualJKflip-flopwithreset;negative-edgetrigger GENERALDESCRIPTION The74HC/HCT107arehigh-speedSi-gateCMOSdevicesandarepincompatiblewithlowpowerSchottkyTTL(LSTTL).TheyarespecifiedincompliancewithJEDECstandardno.7A. The74HC/HCT107aredualnegative-edgetriggeredJK-typeflip-flopsfeaturingindividualJ,K,cloc | PhilipsPhilips Semiconductors 飞利浦荷兰皇家飞利浦 | Philips | ||
DualJKflip-flopwithreset;negative-edgetrigger GENERALDESCRIPTION The74HC/HCT107arehigh-speedSi-gateCMOSdevicesandarepincompatiblewithlowpowerSchottkyTTL(LSTTL).TheyarespecifiedincompliancewithJEDECstandardno.7A. The74HC/HCT107aredualnegative-edgetriggeredJK-typeflip-flopsfeaturingindividualJ,K,cloc | PhilipsPhilips Semiconductors 飞利浦荷兰皇家飞利浦 | Philips | ||
DualJKflip-flopwithreset;negative-edgetrigger GENERALDESCRIPTION The74HC/HCT107arehigh-speedSi-gateCMOSdevicesandarepincompatiblewithlowpowerSchottkyTTL(LSTTL).TheyarespecifiedincompliancewithJEDECstandardno.7A. The74HC/HCT107aredualnegative-edgetriggeredJK-typeflip-flopsfeaturingindividualJ,K,cloc | PhilipsPhilips Semiconductors 飞利浦荷兰皇家飞利浦 | Philips | ||
DualJKflip-flopwithreset;negative-edgetrigger 1.Generaldescription The74HC107;74HCT107isadualnegativeedgetriggeredJKflip-flopfeaturingindividualJand Kinputs,clock(CP)andreset(R)inputsandcomplementaryQandQoutputs.Theresetisan asynchronousactiveLOWinputandoperatesindependentlyoftheclockinput.TheJ | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | NEXPERIA | ||
DualJKflip-flopwithreset;negative-edgetrigger GENERALDESCRIPTION The74HC/HCT107arehigh-speedSi-gateCMOSdevicesandarepincompatiblewithlowpowerSchottkyTTL(LSTTL).TheyarespecifiedincompliancewithJEDECstandardno.7A. The74HC/HCT107aredualnegative-edgetriggeredJK-typeflip-flopsfeaturingindividualJ,K,cloc | PhilipsPhilips Semiconductors 飞利浦荷兰皇家飞利浦 | Philips | ||
DualJ-KFlip-FlopwithResetNegative-EdgeTrigger Features •HysteresisonClockInputsforImprovedNoiseImmunity andIncreasedInputRiseandFallTimes •AsynchronousReset •ComplementaryOutputs •BufferedInputs •TypicalfMAX=60MHzatVCC=5V,CL=15pF, TA=25oC •Fanout(OverTemperatureRange) -StandardOutputs..... | TI2Texas Instruments 德州仪器美国德州仪器公司 | TI2 | ||
DualJ-KFlip-FlopwithResetNegative-EdgeTrigger | TITexas Instruments 德州仪器美国德州仪器公司 | TI |
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