CD74HC107集成电路（IC）的触发器规格书PDF中文资料

CD74HC107属于集成电路（IC）的触发器。由德州仪器制造生产的CD74HC107触发器触发器是能够存储单个逻辑状态或信息“位”的基本数字存储器件。这些器件至少有两个输入；一个或多个用于传递要存储的数据，另一个用于指示存储该数据的时间点。不同的触发器类型，例如 D（延迟）、SR（置位复位）和 JK，对提供给其输入的信号有不同的响应，可用于实现不同的逻辑功能。这些器件与锁存器的不同之处在于它们是边缘敏感器件，其保持的逻辑状态仅在接收到有效时钟信号时才会改变。

特性 Features

• Hysteresis on Clock Inputs for Improved Noise Immunity

and Increased Input Rise and Fall Times

• Asynchronous Reset

• Complementary Outputs

• Buffered Inputs

• Typical fMAX = 60MHz at VCC = 5V, CL = 15pF,

TA = 25oC

• Fanout (Over Temperature Range)

- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

• Wide Operating Temperature Range . . . -55oC to 125oC

• Balanced Propagation Delay and Transition Times

• Significant Power Reduction Compared to LSTTL

Logic ICs

• HC Types

- 2V to 6V Operation

- High Noise Immunity: NIL = 30%, NIH = 30% of VCC

at VCC = 5V

• HCT Types

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility,

VIL= 0.8V (Max), VIH = 2V (Min)

- CMOS Input Compatibility, Il ≤ 1μA at VOL, VOH

描述 Description

The ’HC107 and CD74HCT107 utilize silicon gate CMOS

technology to achieve operating speeds equivalent to LSTTL

parts. They exhibit the low power consumption of standard

CMOS integrated circuits, together with the ability to drive 10

LSTTL loads.

These flip-flops have independent J, K, Reset and Clock

inputs and Q and Q outputs. They change state on the

negative-going transition of the clock pulse. Reset is

accomplished asynchronously by a low level input.

This device is functionally identical to the HC/HCT73 but

differs in terminal assignment and in some parametric limits.

The HCT logic family is functionally as well as pin compatible

with the standard LS family.