High Speed Translator Buffer to PECL

DESCRIPTION The PLL130-08 is a low cost, high performance, high speed, buffer that reproduces any input frequency from DC to 1.0GHz. It provides a pair of differential PECL output. Any input signal with at least 100mV swing can be used as reference signal. This chip is ideal for conversion from s

文件：240.09 Kbytes 页数：5 Pages

PLL

High Speed Translator Buffer to LVDS

DESCRIPTION The PLL130-09 is a low cost, high performance, high speed, buffer that reproduces any input frequency from DC to 1.0GHz. It provides a pair of differential LVDS output. Any input signal with at least 100mV swing can be used as reference signal. This chip is ideal for conversion from

文件：237.05 Kbytes 页数：5 Pages

PLL

High Speed Translator Buffer to LVDS

DESCRIPTION The PLL130-09 is a low cost, high performance, high speed, buffer that reproduces any input frequency from DC to 1.0GHz. It provides a pair of differential LVDS output. Any input signal with at least 100mV swing can be used as reference signal. This chip is ideal for conversion from

文件：237.05 Kbytes 页数：5 Pages

PLL

High Speed Translator Buffer to LVDS

DESCRIPTION The PLL130-09 is a low cost, high performance, high speed, buffer that reproduces any input frequency from DC to 1.0GHz. It provides a pair of differential LVDS output. Any input signal with at least 100mV swing can be used as reference signal. This chip is ideal for conversion from

文件：237.05 Kbytes 页数：5 Pages

PLL

High Speed Translator Buffer to LVDS

DESCRIPTION The PLL130-09 is a low cost, high performance, high speed, buffer that reproduces any input frequency from DC to 1.0GHz. It provides a pair of differential LVDS output. Any input signal with at least 100mV swing can be used as reference signal. This chip is ideal for conversion from

文件：237.05 Kbytes 页数：5 Pages

PLL

High Speed Translator Buffer to LVDS

DESCRIPTION The PLL130-09 is a low cost, high performance, high speed, buffer that reproduces any input frequency from DC to 1.0GHz. It provides a pair of differential LVDS output. Any input signal with at least 100mV swing can be used as reference signal. This chip is ideal for conversion from

文件：237.05 Kbytes 页数：5 Pages

PLL

High Speed Translator Buffer to LVDS

DESCRIPTION The PLL130-09 is a low cost, high performance, high speed, buffer that reproduces any input frequency from DC to 1.0GHz. It provides a pair of differential LVDS output. Any input signal with at least 100mV swing can be used as reference signal. This chip is ideal for conversion from

文件：237.05 Kbytes 页数：5 Pages

PLL

High Speed Translator Buffer to LVDS

DESCRIPTION The PLL130-09 is a low cost, high performance, high speed, buffer that reproduces any input frequency from DC to 1.0GHz. It provides a pair of differential LVDS output. Any input signal with at least 100mV swing can be used as reference signal. This chip is ideal for conversion from

文件：237.05 Kbytes 页数：5 Pages

PLL

High Speed Translator Buffers: Single ended to PECL or LVDS

DESCRIPTION The PLL130-68 and PLL130-69 are low cost, high performance, high speed, translator buffers that reproduce any input frequency from DC to 1.0GHz. They provide a pair of differential out puts (PECL for PLL130-68 or LVDS for PLL130-69). Thanks to an internal AC coupling of the referenc

文件：224.71 Kbytes 页数：5 Pages

PLL

High Speed Translator Buffers: Single ended to PECL or LVDS

DESCRIPTION The PLL130-68 and PLL130-69 are low cost, high performance, high speed, translator buffers that reproduce any input frequency from DC to 1.0GHz. They provide a pair of differential out puts (PECL for PLL130-68 or LVDS for PLL130-69). Thanks to an internal AC coupling of the referenc

文件：224.71 Kbytes 页数：5 Pages

PLL