TrenchMOS transistor Standard level FET

GENERAL DESCRIPTION N-channel enhancement mode standard level field-effect power transistor in a plastic envelope using ’trench’ technology. The device features very low on-state resistance and has integral zener diodes giving ESD protection up to 2kV. It is intended for use in DC-DC converters a

文件：59.81 Kbytes 页数：8 Pages

PHI

PHI

TrenchMOS transistor Standard level FET

恩XP

N-channel TrenchMOS transistor Logic level FET

GENERAL DESCRIPTION N-channel enhancement mode logic level field-effect power transistor in a plastic envelope using ’trench’ technology. FEATURES • ’Trench’technology • Very low on-state resistance • Fast switching • Low thermal resistance • Logic level compatible Appl

文件：108.44 Kbytes 页数：11 Pages

PHI

PHI

isc N-Channel MOSFET Transistor

FEATURES ·Drain Current -ID= 69A@ TC=25℃ ·Drain Source Voltage -VDSS= 30V(Min) ·Static Drain-Source On-Resistance -RDS(on) = 14mΩ(Max)@VGS= 10V DESCRIPTION ·DC-to-DC Converter ·General Industrial Applications ·Power Motor Control

文件：345.27 Kbytes 页数：2 Pages

ISC

无锡固电

TrenchMOS transistor Standard level FET

GENERAL DESCRIPTION N-channel enhancement mode standard level field-effect power transistor in a plastic envelope suitable for surface mounting using ’trench’ technology. The device features very low on-state resistance and has integral zener diodes giving ESD protection up to 2kV. It is intended

文件：66.11 Kbytes 页数：8 Pages

PHI

PHI