Quad Type D Flip-Flop

文件：128.169 Kbytes 页数：6 Pages

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Quad Type D Flip-Flop

文件：149.44 Kbytes 页数：6 Pages

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安森美半导体

Quad Type D Flip?묯lop

文件：123.91 Kbytes 页数：6 Pages

ONSEMI

安森美半导体

Quad Type D Flip?묯lop

文件：123.91 Kbytes 页数：6 Pages

ONSEMI

安森美半导体

Quad Type D Flip-Flop

文件：128.169 Kbytes 页数：6 Pages

ONSEMI

安森美半导体

Quad Type D Flip-Flop

文件：149.44 Kbytes 页数：6 Pages

ONSEMI

安森美半导体

六路 D 类触发器

The MC14174B hex type D flip-flop is constructed with MOS P-channel and N-channel enhancement mode devices in a single monolithic structure. Data on the D inputs which meets the setup time requirements is transferred to the Q outputs on the positive edge of the clock pulse. All six flip-flops share • Static Operation\n• All Inputs and Outputs Buffered\n• Diode Protection on All Inputs\n• Supply Voltage Range = 3.0 Vdc to 18 Vdc\n• Capable of Driving Two Low-Power TTL Loads or One Low-Power Schottky TTL Load over the Rated Temperature Range\n• Functional Equivalent to TTL 74174\n• Pb-Free Packa;

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安森美半导体

CMOS LSI(LOW-POWER COMPLEMENTARY MOS) 3 1/2 DIGIT A/D CONVERTER

CMOS LSI(LOW-POWER COMPLEMENTARY MOS) 3 1/2 DIGIT A/D CONVERTER

恩XP

四路 D 型触发器

The MC14175B quad type D flip-flop is constructed with MOS P-channel and N-channel enhancement mode devices in a single monolithic structure. Each of the four flip-flops is positive-edge triggered by a common clock input (C). An active-low reset input (R) asynchronously resets all flip-flops. Each f • Complementary Outputs\n• Static Operation\n• All Inputs and Outputs Buffered\n• Diode Protection on All Inputs\n• Supply Voltage Range = 3.0 Vdc to 18 Vdc\n• Output Compatible with Two Low-Power TTL Loads or One Low-Power Schottky TTL Load\n• Functional Equivalent to TTL 74175\n• Pb-Free Packages ;

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安森美半导体

Package：16-SOIC（0.154"，3.90mm 宽）；包装：卷带（TR） 功能：复位 类别：集成电路（IC） 触发器 描述：IC FF D-TYPE SNGL 6BIT 16SOIC

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安森美半导体