Differential Receiver

The MC10EL/100EL16 is a differential receiver. The device is functionally equivalent to the E116 device with higher performance capabilities. With output transition times significantly faster than the E116, the EL16 is ideally suited for interfacing with high frequency sources. The VBB pin, an in

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Differential Receiver

The MC10EL/100EL16 is a differential receiver. The device is functionally equivalent to the E116 device with higher performance capabilities. With output transition times significantly faster than the E116, the EL16 is ideally suited for interfacing with high frequency sources. The VBB pin, an in

文件：69.44 Kbytes 页数：8 Pages

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Differential Receiver

The MC10EL/100EL16 is a differential receiver. The device is functionally equivalent to the E116 device with higher performance capabilities. With output transition times significantly faster than the E116, the EL16 is ideally suited for interfacing with high frequency sources. The VBB pin, an in

文件：69.44 Kbytes 页数：8 Pages

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安森美半导体

Differential Receiver

The MC10EL/100EL16 is a differential receiver. The device is functionally equivalent to the E116 device with higher performance capabilities. With output transition times significantly faster than the E116, the EL16 is ideally suited for interfacing with high frequency sources. The VBB pin, an in

文件：69.44 Kbytes 页数：8 Pages

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Low-Voltage Quad Differential Receiver

Description The MC100LVEL17 is a 3.3 V ECL, quad differential receiver. The device is functionally equivalent to the E116 device with the capability of operation from either a −3.3 V or +3.3 V supply voltage. Features • 325 ps Propagation Delay • High Bandwidth Output Transitions • The 100 Se

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Dual Differential Data and Clock D Flip-Flop With Set and Reset

Description The MC100LVEL29 is a dual master−slave flip flop. The device features fully differential Data and Clock inputs as well as outputs. The MC100LVEL29 is pin and functionally equivalent to the MC100EL29. Data enters the master latch when the clock is LOW and transfers to the slave upon a

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Triple D Flip-Flop With Set and Reset

Description The MC100LVEL30 is a triple master−slave D flip−flop with differential outputs. Data enters the master latch when the clock input is LOW and transfers to the slave upon a positive transition on the clock input. In addition to a common Set input individual Reset inputs are provided fo

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D Flip-Flop With Set and Reset

5 V ECL D Flip‐Flop With Set and Reset The MC10EL/100EL31 is a D flip-flop with set and reset. The device is functionally equivalent to the E131 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E131, the EL31 is idea

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첨2 Divider

Description The MC10EL/100EL32 is an integrated ÷2 divider. The differential clock inputs and the VBB allow a differential, single-ended or AC coupled interface to the device. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions,

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첨4 Divider

Description The MC10EL/100EL33 is an integrated ÷4 divider. The differential clock inputs and the VBB allow a differential, single-ended or AC coupled interface to the device. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions,

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