첨2 Divider

Description The MC10EL/100EL32 is an integrated ÷2 divider. The differential clock inputs and the VBB allow a differential, single-ended or AC coupled interface to the device. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions,

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5V ECL 첨2 Divider

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5V ECL 첨2 Divider

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5.0 V ECL ÷·2 分频器

The MC10EL/100EL32 is an integrateddivide by 2 divider. The differential clock inputs and the VBB allow a differential, single-ended or AC coupled interface to the device. If used, the VBB output should be bypassed to ground with a 0.01 F capacitor. Also note that the VBB is designed to be used as a • 510ps Propagation Delay\n• 3.0GHz Toggle Frequency\n• ESD Protection: > 1 KV HBM, > 100 V MM\n• PECL Mode Operating Range: VCC= 4.2 V to 5.7 V with VEE= 0 V\n• NECL Mode Operating Range: VCC= 0 V with VEE= -4.2 V to -5.7 V\n• Internal Input Pulldown Resistors on CLK(s) and R.\n• Meets or Exceeds J;

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5V ECL 첨2 Divider

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Evaluation Board Manual for High Frequency SOIC 8

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5V ECL 첨2 Divider

文件：155 Kbytes 页数：9 Pages

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安森美半导体

5V ECL 첨2 Divider

文件：155 Kbytes 页数：9 Pages

ONSEMI

安森美半导体

5V ECL 첨2 Divider

文件：152.01 Kbytes 页数：9 Pages

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安森美半导体

Divider

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