QorIQ LS1021A Data Sheet

Features • Arm® Cortex®-A7 MPCore compliant with Armv7-A™ architecture • LS1021A contains a dual-core Cortex-A7. Each core includes: – 32 KB L1 Instruction Cache (ECC protection) – 32 KB L1 Data Cache (ECC protection) – NEON co-processor – Floating Point (FPU) – QorIQ Trust Architecture and

文件：2.074489 Mbytes 页数：205 Pages

恩XP

QorIQ LS1021A Data Sheet

Features • Arm® Cortex®-A7 MPCore compliant with Armv7-A™ architecture • LS1021A contains a dual-core Cortex-A7. Each core includes: – 32 KB L1 Instruction Cache (ECC protection) – 32 KB L1 Data Cache (ECC protection) – NEON co-processor – Floating Point (FPU) – QorIQ Trust Architecture and

文件：2.074489 Mbytes 页数：205 Pages

恩XP

QorIQ LS1021A Data Sheet

Features • Arm® Cortex®-A7 MPCore compliant with Armv7-A™ architecture • LS1021A contains a dual-core Cortex-A7. Each core includes: – 32 KB L1 Instruction Cache (ECC protection) – 32 KB L1 Data Cache (ECC protection) – NEON co-processor – Floating Point (FPU) – QorIQ Trust Architecture and

文件：2.074489 Mbytes 页数：205 Pages

恩XP

QorIQ LS1021A Data Sheet

Features • Arm® Cortex®-A7 MPCore compliant with Armv7-A™ architecture • LS1021A contains a dual-core Cortex-A7. Each core includes: – 32 KB L1 Instruction Cache (ECC protection) – 32 KB L1 Data Cache (ECC protection) – NEON co-processor – Floating Point (FPU) – QorIQ Trust Architecture and

文件：2.074489 Mbytes 页数：205 Pages

恩XP

QorIQ LS1021A Data Sheet

Features • Arm® Cortex®-A7 MPCore compliant with Armv7-A™ architecture • LS1021A contains a dual-core Cortex-A7. Each core includes: – 32 KB L1 Instruction Cache (ECC protection) – 32 KB L1 Data Cache (ECC protection) – NEON co-processor – Floating Point (FPU) – QorIQ Trust Architecture and

文件：2.074489 Mbytes 页数：205 Pages

恩XP

QorIQ LS1021A Data Sheet

Features • Arm® Cortex®-A7 MPCore compliant with Armv7-A™ architecture • LS1021A contains a dual-core Cortex-A7. Each core includes: – 32 KB L1 Instruction Cache (ECC protection) – 32 KB L1 Data Cache (ECC protection) – NEON co-processor – Floating Point (FPU) – QorIQ Trust Architecture and

文件：2.074489 Mbytes 页数：205 Pages

恩XP

QorIQ LS1021A Data Sheet

Features • Arm® Cortex®-A7 MPCore compliant with Armv7-A™ architecture • LS1021A contains a dual-core Cortex-A7. Each core includes: – 32 KB L1 Instruction Cache (ECC protection) – 32 KB L1 Data Cache (ECC protection) – NEON co-processor – Floating Point (FPU) – QorIQ Trust Architecture and

文件：2.074489 Mbytes 页数：205 Pages

恩XP

QorIQ LS1021A Data Sheet

Features • Arm® Cortex®-A7 MPCore compliant with Armv7-A™ architecture • LS1021A contains a dual-core Cortex-A7. Each core includes: – 32 KB L1 Instruction Cache (ECC protection) – 32 KB L1 Data Cache (ECC protection) – NEON co-processor – Floating Point (FPU) – QorIQ Trust Architecture and

文件：2.074489 Mbytes 页数：205 Pages

恩XP

Small Signal Schottky Barrier Diodes

Features ◆ Integrated protection ring against static discharge ◆ Low capacitance ◆ Low leakage current ◆ Low forward voltage drop Applications HF-Detector Protection circuit Small battery charger AC-DC / DC-DC converters

文件：94.17 Kbytes 页数：2 Pages

GOOD-ARK

固锝电子

200mA Surface Mount Schottky Barrier Diode

Features ● Integrated protection ring against static discharge ● Low capacitance ● Low leakage current ● Low forward voltage drop ● Lead (Pb)-free component ● Component in accordance to RoHS 2002/95/EC and WEEE 2002/96/EC

文件：200.67 Kbytes 页数：2 Pages

SUNMATE

森美特