SII9022A代理SII9022A现货供应.
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SiI9022A SiI9022ACNU-HDMI® 发送器 LTC3789 TPS40210DGQ 现货供应
照相机、摄影机和便携式媒体播放器的高清解决方案
SiI9022a是一款超低功耗的HDMI发送器，集成度更高, 电源管理特性也更强，
适用于手提式消费电子设备如移动电话、照相机、便携式媒体播放器和
个人上网设备。
SiI9022A应用产品:
数码相机&摄影机,
手机、
便携式相机,
便携式多媒体播放器
SiI9022A符合下列标准
HDMI 1.3 Simplay HD DVI 1.0 EIA/CEA-861B
SiI9022A数字视频特性
集成 TMDS内核 DTV 分辨率支持- 480i/576i/ 480p/576p/720p/1080i/1080p 等
PC分辨率支持 - VGA/XGA/ SXGA/WSXGA/UXGA 等 与HD MPEG解码器的连接
可选择如下接口： 12/24-位 RGB YCbCr 4:4:4 16/20/24-位YCbCr
4:2:2 8/10/12-位YCbCr 4:2:2 (ITU-R BT.601 & BT.656)
集成 YCbCr —> RGB 转换 4:2:2 —> 4:4:4 上变换
内置可编程DE信号 发生器 支持HDMI 1.3 x.v.YCC
CEC控制 (CEC)
专用 CEC信号 集成硬件总线仲裁电路以降低CPU开销
SiI9022A数字音频特性
通过1路I2S 输入支持DVD-音频 (49Pin BGA) 通过4路I2S 输入
支持DVD-音频 (81Pin BGA) 支持 2通道 192kHz 或 8通道 96kH
支持IEC60958 2通道 PCM 或 IEC61937 压缩音频（杜比数字、DTS等）
标准 S/PDIF输入 外部输入MCLK 可选(非必须)
SiI9022A系统操作
通过TPI和CPI简化编程 可编程DDC控制器简化系统设计
灵活的中断寄存器设置，并带有中断引脚 通过热插拔和接收器感应
支持检测监视器
电源管理
支持D3、D2、D0 ACPI 电源状态
工作温度范围
-20C°至 +85C°
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专业配单：为您提高效益的同时也能最大限度的降低成本！无论数量多少，都可申请最优势的价格！创芯弘用最真诚的态度期待与您的合作！祝您采购无忧~！
深圳市创芯弘科技有限公司
创芯弘国际（香港）有限公司
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创芯弘科技连续两年荣获“电子元器件行业十大金牌优质供应商
Lattice公司的ECP5-5G系列是支持5G SERDES和有多达85K LUT的FPGA,支持的5G协议包括PCI Express Gen 2.0, CPRI和JESD204B,能无缝地连接到ASIC和ASSP,主要应用包括照相机,显示器,游戏平台,小性和低端路由器.本文介绍了ECP5-5G系列主要特性和优势,以及ECP5™ PCI Express板主要特性,框图,电路图和材料清单.
Lattice’s ECP5-5G family is the only FPGA product line supporting 5G SERDES and up to 85K LUTs in a small 10x10 mm package. The ECP5-5G devices support multiple 5G protocols including PCI Express Gen 2.0, CPRI, and JESD204B. This product family enables seamless connectivity to ASICs and ASSPs in a wide array of applications including cameras, displays, gaming platforms, small cells and low-end routers. Numerous resources including software, device samples, soft IP and hardware boards are available upon request.
Designers of equipment for many emerging high volumeapplications are blending FPGAs with ASICs and ASSPs torapidly build flexible systems that meet tight cost, power and formfactor constraints. In developing the ECP5TM FPGA family, Latticebreaks the rule that all FPGAs should be the highest density,power hungry, and expensive. With a focus on compact, highvolume applications, Lattice optimized the ECP5 architecture forlow cost, small form factor and low power consumption. Thesecharacteristics make the ECP5/ECP5-5G devices ideal fordelivering programmable connectivity solutions to complementASICs and ASSPs.
With up to 85K LUTs, 3.7Mbits embedded memory, 156 sysDSP blocks with DDR support, four 3.2Gbps/5Gbps SERDES channelsand 365 user IO, the ECP5/ECP5-5G devices provide a low-cost solution that meets the common connectivity requirements forcomplementing ASICs and ASSPs. A broad range of interface standards are supported including DDR3, LPDDR3, XGMII and7:1 LVDS, PCI Express, Ethernet (XAUI, GbE, SGMII) and CPRI. The devices are offered in multiple package options, and alsoinclude support for encryption and dual boot capabilities. Smart depopulation of balls simplifies PCB board routing and reducescost by utilizing fewer layers. Low power enhancements include stand-by mode operation of the individual blocks including SERDES,dynamic IO bank controllers and reduced operating voltage. The ECP5 family is supported by the Lattice DiamondTM designsoftware, the leading-edge design and implementation tool optimized for cost sensitive, low-power Lattice FPGA architectures.
ECP5-5G系列主要特性和优势:
Cost Optimized Architecture
• Focused on providing best value below 100K LUTs.
• Smart ball depopulation simplifies package integration withexisting PCB technology.
• Double Data Rate capability improves DSP block utilization.
Small Packages with High Functional Density
• 85K LUTs in 10x10 mm, 0.5 mm pitch package with SERDES.
Low Power Consumption
• Single channel SERDES functions below 0.25W.
• Quad channel SERDES functions below 0.5W.
ECP5™ PCI Express板
The ECP5™ PCI Express Board allows designers to investigate and experiment with the features of the ECP5 Field-Programmable Gate Array. The features of the ECP5 PCI Express Board can assist engineers with rapid prototyping and testing of their specific designs. The guide is intended to be referenced in conjunction with demo user’s guides to demonstrate the ECP5 FPGA.
