■ The industry’s first embedded programmable logic device (PLD)
family, providing System-on-a-Programmable-Chip (SOPC)
integration
– Embedded array for implementing megafunctions, such as
efficient memory and specialized logic functions
– Logic array for general logic functions
■ High density
– 10,000 to 250,000 typical gates (see Tables 1 and 2)
– Up to 40,960 RAM bits; 2,048 bits per embedded array block
(EAB), all of which can be used without reducing logic capacity
■ System-level features
– MultiVolt
TM
I/O interface support
– 5.0-V tolerant input pins in FLEX
?
10KA devices
– Low power consumption (typical specification less than 0.5 mA
in standby mode for most devices)
– FLEX 10K and FLEX 10KA devices support peripheral
component interconnect Special Interest Group (PCI SIG) PCI
Local Bus Specification, Revision 2.2
– FLEX 10KA devices include pull-up clamping diode, selectable
on a pin-by-pin basis for 3.3-V PCI compliance
– Select FLEX 10KA devices support 5.0-V PCI buses with eight or
fewer loads
– Built-in Joint Test Action Group (JTAG) boundary-scan test
(BST) circuitry compliant with IEEE Std. 1149.1-1990, available
without consuming any device logic
■ Flexible interconnect
– FastTrack
?
Interconnect continuous routing structure for fast,
predictable interconnect delays
– Dedicated carry chain that implements arithmetic functions such
as fast adders, counters, and comparators (automatically used by
software tools and megafunctions)
– Dedicated cascade chain that implements high-speed,
high-fan-in logic functions (automatically used by software tools
and megafunctions)
– Tri-state emulation that implements internal tri-state buses
– Up to six global clock signals and four global clear signals
■ Powerful I/O pins
– Individual tri-state output enable control for each pin
– Open-drain option on each I/O pin
– Programmable output slew-rate control to reduce switching
noise
– FLEX 10KA devices support hot-socketing
■ Peripheral register for fast setup and clock-to-output delay
■ Flexible package options
– Available in a variety of packages with 84 to 600 pins (see
Tables 4 and 5)
– Pin-compatibility with other FLEX 10K devices in the same
package
– FineLine BGA
TM
packages maximize board space efficiency
■ Software design support and automatic place-and-route provided by
Altera development systems for Windows-based PCs and Sun
SPARCstation, HP 9000 Series 700/800 workstations
■ Additional design entry and simulation support provided by EDIF
2 0 0 and 3 0 0 netlist files, library of parameterized modules (LPM),
DesignWare components, Verilog HDL, VHDL, and other interfaces
to popular EDA tools from manufacturers such as Cadence,
Exemplar Logic, Mentor Graphics, OrCAD, Synopsys, Synplicity,
VeriBest, and Viewlogic
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专业代理，全新到货，大量现货欢迎询问！！！
质优价廉，品质保证！
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深圳德田科技有限公司
Shenzhen Spring Technology Co.,Ltd
地址：深圳市福田区振华路122号海外装饰大厦A座201B室
Shenzhen futian district zhenhua road 122 overseas decoration building, room 211, block A, 518031
李先生
电话（Tel）：(+86-755) 8350 5153
传真（Fax）：(+86-755) 8350 2530
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