DSP56307EVM Evaluation Module

FEATURES Hardware • 24-bit DSP56307 Digital Signal Processor – High -Performance DSP56300 core • 100 Million Instructions Per Second (MIPS) with a 100-MHz clock at 2.5-V core and 3.3 V I/O • Object code compatible with the DSP56000 core • Highly-parallel instruction set • Data Arithmetic L

文件：246.29 Kbytes 页数：8 Pages

恩XP

24-BIT DIGITAL SIGNAL PROCESSOR

24-BIT DIGITAL SIGNAL PROCESSOR The Motorola DSP56307, a member of the DSP56300 family of programmable digital signal processors (DSPs), supports wireless infrastructure applications with general filtering operations. The on-chip enhanced filter coprocessor (EFCOP) processes filter algorithms in

文件：947.84 Kbytes 页数：156 Pages

Motorola

摩托罗拉

24-Bit Digital Signal Processor

24-Bit Digital Signal Processor The DSP56309 is a member of the DSP56300 core family of programmable CMOS DSPs. The DSP56300 core includes a barrel shifter, 24-bit addressing, an instruction cache, and direct memory access (DMA). The DSP56309 offers 100 MMACS at 3.0–3.6 V using an inter

文件：1.90848 Mbytes 页数：108 Pages

freescaleFreescale Semiconductor, Inc

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24-Bit Digital Signal Processor

24-Bit Digital Signal Processor The DSP56309 is a member of the DSP56300 core family of programmable CMOS digital signal processors (DSPs). The DSP56300 core includes a barrel shifter, 24-bit addressing, an instruction cache, and direct memory access (DMA). The DSP56309 offers 100 MIPS at 3.0

文件：4.3652 Mbytes 页数：424 Pages

Motorola

摩托罗拉

24-Bit Digital Signal Processor

Features 100 million multiply-accumulates per second (MMACS) with a 100 MHz clock at 3.3 V nominal Data arithmetic logic unit (Data ALU) with fully pipelined 24 × 24-bit parallel multiplier-accumulator (MAC), 56-bit parallel barrel shifter (fast shift and normalization; bit stream generation an

文件：2.35451 Mbytes 页数：108 Pages

恩XP

24-Bit Digital Signal Processor

24-Bit Digital Signal Processor The DSP56309 is a member of the DSP56300 core family of programmable CMOS digital signal processors (DSPs). The DSP56300 core includes a barrel shifter, 24-bit addressing, an instruction cache, and direct memory access (DMA). The DSP56309 offers 100 MIPS at 3.0

文件：4.3652 Mbytes 页数：424 Pages

Motorola

摩托罗拉

24-Bit Digital Signal Processor

24-Bit Digital Signal Processor The DSP56309 is a member of the DSP56300 core family of programmable CMOS digital signal processors (DSPs). The DSP56300 core includes a barrel shifter, 24-bit addressing, an instruction cache, and direct memory access (DMA). The DSP56309 offers 100 MIPS at 3.0

文件：4.3652 Mbytes 页数：424 Pages

Motorola

摩托罗拉

24-Bit Digital Signal Processor

Features 100 million multiply-accumulates per second (MMACS) with a 100 MHz clock at 3.3 V nominal Data arithmetic logic unit (Data ALU) with fully pipelined 24 × 24-bit parallel multiplier-accumulator (MAC), 56-bit parallel barrel shifter (fast shift and normalization; bit stream generation an

文件：2.35451 Mbytes 页数：108 Pages

恩XP

24-Bit Digital Signal Processor

Features • Up to 150 million multiply-accumulates per second (MMACS) (300 MMACS using the EFCOP in filtering applications) with a 150 MHz clock at 1.8 V core and 3.3 V I/O • Object code compatible with the DSP56000 core with highly parallel instruction set • Data arithmetic logic unit (Data AL

文件：2.062429 Mbytes 页数：96 Pages

恩XP

24-Bit Digital Signal Processor

The DSP56311 is intended for applications requiring a large amount of internal memory, such as networking and wireless infrastructure applications. The onboard EFCOP can accelerate general filtering applications, such as echo-cancellation applications, correlation, and general-purpose convolution

文件：1.66698 Mbytes 页数：96 Pages

freescaleFreescale Semiconductor, Inc

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