| 型号 | 下载 订购 | 功能描述 | 制造商 上传企业 | LOGO |
|---|---|---|---|---|
CD4012BE | 丝印：CD4012BE；Package：PDIP；CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre 文件：1.0201 Mbytes 页数：23 Pages | TI 德州仪器 | TI | |
丝印：CD4012BE；Package：PDIP；CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre 文件：1.0201 Mbytes 页数：23 Pages | TI 德州仪器 | TI | ||
丝印：CD4012BE；Package：PDIP；CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre 文件：1.0201 Mbytes 页数：23 Pages | TI 德州仪器 | TI | ||
CD4012BE | 丝印：CD4012BE；Package：PDIP；CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre 文件：1.0201 Mbytes 页数：23 Pages | TI 德州仪器 | TI | |
丝印：CD4012BE；Package：PDIP；CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre 文件：1.0201 Mbytes 页数：23 Pages | TI 德州仪器 | TI | ||
丝印：CD4012BE；Package：PDIP；CMOS NAND GATES Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre 文件：1.0201 Mbytes 页数：23 Pages | TI 德州仪器 | TI | ||
CD4012BE | CMOS NAND GATES 文件：525.82 Kbytes 页数：13 Pages | TI 德州仪器 | TI | |
CD4012BE | The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages 文件：523.01 Kbytes 页数：12 Pages | TI 德州仪器 | TI | |
CD4012BE | CMOS NAND GATES 文件：1.18484 Mbytes 页数：19 Pages | TI 德州仪器 | TI | |
CD4012BE | CMOS NAND GATES 文件：1.29026 Mbytes 页数：20 Pages | TI 德州仪器 | TI |
详细参数
- 型号：
CD4012BE
- 功能描述：
逻辑门 Dual 4-Input
- RoHS：
否
- 制造商：
Texas Instruments
- 产品：
OR
- 逻辑系列：
LVC
- 栅极数量：
2
- 线路数量（输入/输出）：
2/1
- 高电平输出电流：
- 16 mA
- 低电平输出电流：
16 mA
- 传播延迟时间：
3.8 ns
- 电源电压-最大：
5.5 V
- 电源电压-最小：
1.65 V
- 最大工作温度：
+ 125 C
- 安装风格：
SMD/SMT
- 封装/箱体：
DCU-8
- 封装：
Reel
| 供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI(德州仪器) |
24+ |
标准封装 |
7443 |
原厂直销,大量现货库存,交期快。价格优,支持账期 |
询价 | ||
TI/德州仪器 |
25+ |
DIP-14 |
32000 |
TI/德州仪器全新特价CD4012BE即刻询购立享优惠#长期有货 |
询价 | ||
TI |
23+ |
14-DIP |
15000 |
TI现货商!原装正品! |
询价 | ||
TI/德州仪器 |
22+ |
DIP-14 |
500000 |
原装现货支持实单价优/含税 |
询价 | ||
TI/德州仪器 |
2023+ |
DIP |
53200 |
正品,原装现货 |
询价 | ||
TI/德州仪器 |
25+ |
DIP-14 |
4987 |
强势库存!绝对原装公司现货! |
询价 | ||
TI/德州仪器 |
2410+ |
DIP |
50000 |
原装正品.假一赔百.正规渠道.原厂追溯. |
询价 | ||
XBLW芯伯乐 |
24+ |
DIP-14 |
50000 |
品牌代理,价格优势,技术支持!!可直接对标进口品牌! |
询价 | ||
TI/德州仪器 |
24+ |
DIP-14 |
10000 |
只做原装 |
询价 | ||
TI |
24+ |
DIP |
8500 |
只做原装正品假一赔十为客户做到零风险!! |
询价 |
相关芯片丝印
更多- CD4012BF3A
- CD4012BM
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- CD4012BM96G4
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相关库存
更多- CD4012BF3A.A
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- CD4015BE
- CD4015BEE4
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- CD40161BE
- CD40161BF3A
- CD40174BNSR
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- CD40174BEE4
- CD40174BF.A
- CD40174BF3A.A
- CD40174BM96
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- CD4018BF
- CD4018BF3A
- CD4018BM
- CD4018BM96.A
- CD40192BNSR
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- CD40192BF
