CMOS NAND GATES

文件：1.18484 Mbytes 页数：19 Pages

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德州仪器

CMOS NAND GATES

文件：1.29026 Mbytes 页数：20 Pages

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德州仪器

CMOS NAND GATES

文件：1.18484 Mbytes 页数：19 Pages

TI

德州仪器

The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages

文件：523.01 Kbytes 页数：12 Pages

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德州仪器

CMOS NAND GATES

文件：525.82 Kbytes 页数：13 Pages

TI

德州仪器

CMOS NAND GATES

文件：525.82 Kbytes 页数：13 Pages

TI

德州仪器

2 通道、4 输入、3V 至 18V 与非门

CD4011B, CD4012B, and CD4023B NAND gates provide the system designer with direct implementation of the NANDfunction and supplement the existing family of CMOS gates. All inputs and outputs are buffered.\n\n The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic • Propagation delay time = 60 ns (typ.) at CL = 50 pF, VDD = 10 V\n• Standardized symmetrical output characteristics\n• 100% tested for quiescent current at 20 V\n• Noise margin (over full package temperature range:     1 V at VDD = 5 V     2 V at VDD = 10 V     2.5 at VDD = 15 V\n• Meets all re;

TI

德州仪器

军用 2 通道 4 输入 3V 至 18V 与非门

CD4011B, CD4012B, and CD4023B NAND gates provide the system designer with direct implementation of the NANDfunction and supplement the existing family of CMOS gates. All inputs and outputs are buffered.\n\n The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic • Propagation delay time = 60 ns (typ.) at CL = 50 pF, VDD = 10 V\n• Standardized symmetrical output characteristics\n• 100% tested for quiescent current at 20 V\n• Noise margin (over full package temperature range:     1 V at VDD = 5 V     2 V at VDD = 10 V     2.5 at VDD = 15 V\n• Meets all re;

TI

德州仪器

Package：14-DIP（0.300"，7.62mm）；包装：卷带（TR） 类别：集成电路（IC） 门和反相器 描述：IC GATE NAND 2CH 4-INP 14DIP

TI

德州仪器

Package：14-SOIC（0.154"，3.90mm 宽）；包装：管件 类别：集成电路（IC） 门和反相器 描述：IC GATE NAND 2CH 4-INP 14SOIC

TI

德州仪器