ADC08B200 / ADC08B200Q 8-Bit, 200 MSPS A/D Converter with Capture Buffer

1FEATURES 2• Single-Ended Input • Selectable Capture Buffer Size • PLL for Clock Multiplication • Reference Ladder Top and Bottom Accessible • Linear Power Scaling with Sample Rate • FPGA Training Pattern • AEC-Q100 Grade 2 Qualified • Power-Down Feature APPLICATIONS • Laser Ranging •

文件：1.06183 Mbytes 页数：42 Pages

TI

德州仪器

200 MSPS A/D Converter with Capture Buffer

文件：828.65 Kbytes 页数：39 Pages

TI

德州仪器

8-Bit, 200 MSPS A/D Converter with Capture Buffer

文件：657.06 Kbytes 页数：32 Pages

NSC

国半

8-Bit, 200 MSPS A/D Converter with Capture Buffer

文件：596.77 Kbytes 页数：30 Pages

NSC

国半

缓冲区容量为 1K 的 8 位、200MSPS 模数转换器 (ADC)

The ADC08B200 is a high speed analog-to-digital converter (ADC) with an integrated capture buffer. The 8-bit, 200 MSPS A/D core is based upon the proven ADC08200 with integrated track-and-hold and is optimized for low power consumption. This device contains a selectable size capture buffer of up to • Single-Ended Input\n• PLL for Clock Multiplication\n• Linear Power Scaling with Sample Rate\n• AEC-Q100 Grade 2 Qualified\n• Resolution 8 Bits\n• DNL ±0.4 LSB (typ)\n• THD (fIN= 49 MHz) −53 dBc (typ)\n• Operating (50 MHz) Input 2 mW / Msps (typ)\n• Power Down 2.15 mW (typ);

TI

德州仪器

丝印：DC08B200CIVS；Package：TQFP；ADC08B200 / ADC08B200Q 8-Bit, 200 MSPS A/D Converter with Capture Buffer

1FEATURES 2• Single-Ended Input • Selectable Capture Buffer Size • PLL for Clock Multiplication • Reference Ladder Top and Bottom Accessible • Linear Power Scaling with Sample Rate • FPGA Training Pattern • AEC-Q100 Grade 2 Qualified • Power-Down Feature APPLICATIONS • Laser Ranging •

文件：1.06183 Mbytes 页数：42 Pages

TI

德州仪器

丝印：DC08B200CIVS；Package：TQFP；ADC08B200 / ADC08B200Q 8-Bit, 200 MSPS A/D Converter with Capture Buffer

1FEATURES 2• Single-Ended Input • Selectable Capture Buffer Size • PLL for Clock Multiplication • Reference Ladder Top and Bottom Accessible • Linear Power Scaling with Sample Rate • FPGA Training Pattern • AEC-Q100 Grade 2 Qualified • Power-Down Feature APPLICATIONS • Laser Ranging •

文件：1.06183 Mbytes 页数：42 Pages

TI

德州仪器

丝印：DC08B200CIVS；Package：TQFP；ADC08B200 / ADC08B200Q 8-Bit, 200 MSPS A/D Converter with Capture Buffer

1FEATURES 2• Single-Ended Input • Selectable Capture Buffer Size • PLL for Clock Multiplication • Reference Ladder Top and Bottom Accessible • Linear Power Scaling with Sample Rate • FPGA Training Pattern • AEC-Q100 Grade 2 Qualified • Power-Down Feature APPLICATIONS • Laser Ranging •

文件：1.06183 Mbytes 页数：42 Pages

TI

德州仪器

丝印：DC08B200CIVS；Package：TQFP；ADC08B200 / ADC08B200Q 8-Bit, 200 MSPS A/D Converter with Capture Buffer

1FEATURES 2• Single-Ended Input • Selectable Capture Buffer Size • PLL for Clock Multiplication • Reference Ladder Top and Bottom Accessible • Linear Power Scaling with Sample Rate • FPGA Training Pattern • AEC-Q100 Grade 2 Qualified • Power-Down Feature APPLICATIONS • Laser Ranging •

文件：1.06183 Mbytes 页数：42 Pages

TI

德州仪器

ADC08B200 / ADC08B200Q 8-Bit, 200 MSPS A/D Converter with Capture Buffer

1FEATURES 2• Single-Ended Input • Selectable Capture Buffer Size • PLL for Clock Multiplication • Reference Ladder Top and Bottom Accessible • Linear Power Scaling with Sample Rate • FPGA Training Pattern • AEC-Q100 Grade 2 Qualified • Power-Down Feature APPLICATIONS • Laser Ranging •

文件：1.06183 Mbytes 页数：42 Pages

TI

德州仪器