丝印：DC08B200CIVS；Package：TQFP；ADC08B200 / ADC08B200Q 8-Bit, 200 MSPS A/D Converter with Capture Buffer

1FEATURES 2• Single-Ended Input • Selectable Capture Buffer Size • PLL for Clock Multiplication • Reference Ladder Top and Bottom Accessible • Linear Power Scaling with Sample Rate • FPGA Training Pattern • AEC-Q100 Grade 2 Qualified • Power-Down Feature APPLICATIONS • Laser Ranging •

文件：1.06183 Mbytes 页数：42 Pages

TI

德州仪器

丝印：DC08B200CIVS；Package：TQFP；ADC08B200 / ADC08B200Q 8-Bit, 200 MSPS A/D Converter with Capture Buffer

1FEATURES 2• Single-Ended Input • Selectable Capture Buffer Size • PLL for Clock Multiplication • Reference Ladder Top and Bottom Accessible • Linear Power Scaling with Sample Rate • FPGA Training Pattern • AEC-Q100 Grade 2 Qualified • Power-Down Feature APPLICATIONS • Laser Ranging •

文件：1.06183 Mbytes 页数：42 Pages

TI

德州仪器

丝印：DC08B200CIVS；Package：TQFP；ADC08B200 / ADC08B200Q 8-Bit, 200 MSPS A/D Converter with Capture Buffer

1FEATURES 2• Single-Ended Input • Selectable Capture Buffer Size • PLL for Clock Multiplication • Reference Ladder Top and Bottom Accessible • Linear Power Scaling with Sample Rate • FPGA Training Pattern • AEC-Q100 Grade 2 Qualified • Power-Down Feature APPLICATIONS • Laser Ranging •

文件：1.06183 Mbytes 页数：42 Pages

TI

德州仪器

丝印：DC08B200CIVS；Package：TQFP；ADC08B200 / ADC08B200Q 8-Bit, 200 MSPS A/D Converter with Capture Buffer

1FEATURES 2• Single-Ended Input • Selectable Capture Buffer Size • PLL for Clock Multiplication • Reference Ladder Top and Bottom Accessible • Linear Power Scaling with Sample Rate • FPGA Training Pattern • AEC-Q100 Grade 2 Qualified • Power-Down Feature APPLICATIONS • Laser Ranging •

文件：1.06183 Mbytes 页数：42 Pages

TI

德州仪器