9ZXL1550数据手册集成电路（IC）的应用特定时钟/定时规格书PDF

描述 Description

The 9ZXL1550 is a DB1900Z derivative buffer utilizing Low-Power HCSL (LP-HCSL) outputs to increase edge rates on long traces, reduce board space, and reduce power consumption more than 50% from the original 9ZX21501. It is pin-compatible to the 9ZXL1530 and has the output terminations integrated.It is suitable for PCI-Express Gen1/2/3 or QPI/UPI applications, and uses a fixed external feedback to maintain low drift for demanding QPI/UPI

applications.

特性 Features

• LP-HCSL outputs; up to 90% IO power reduction, better signal integrity over long traces
• Direct connect to 85Ω transmission lines; eliminates 60 termination resistors, saves 103mm² area
• Pin compatible to the 9ZXL1530; easy upgrade to reduced board space
• 64-VFQFPN package; smallest 15 output Z-buffer
• Fixed feedback path: ~ 0ps input-to-output delay
• 9 Selectable SMBus addresses; multiple devices can share same SMBus segment
• Separate VDDIO for outputs; allows maximum power savings
• PLL or bypass mode; PLL can dejitter incoming clock
• 100MHz & 133.33MHz PLL mode; legacy QPI/UPI support
• Selectable PLL BW; minimizes jitter peaking in downstream PLL's
• Spread spectrum compatible; tracks spreading input clock for EMI reduction
• SMBus Interface; unused outputs can be disabled
• 15 - LP-HCSL Differential Output Pairs w/integrated terminations (Zo = 85Ω)