PLL or bypass mode

Description The 9ZXL1550 is a DB1900Z derivative buffer utilizing Low-Power HCSL (LP-HCSL) outputs to increase edge rates on long traces, reduce board space, and reduce power consumption more than 50 from the original 9ZX21501. It is pin-compatible to the 9ZXL1530 and has the output terminations

文件：301.97 Kbytes 页数：18 Pages

IDT

15-output DB1900Z Low-Power Derivative

Features/Benefits • LP-HCSL outputs; up to 90 IO power reduction, better signal integrity over long traces • Direct connect to 85Ω transmission lines; eliminates 60 termination resistors, saves 103mm2 area • Pin compatible to the 9ZXL1530; easy upgrade to reduced board space • 64-VFQFPN pac

文件：496 Kbytes 页数：19 Pages

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瑞萨

15-output DB1900Z Low-Power Derivative

文件：301.47 Kbytes 页数：18 Pages

IDT

15-output DB1900Z Derivative

The 9ZXL1550 is a DB1900Z derivative buffer utilizing Low-Power HCSL (LP-HCSL) outputs to increase edge rates on long traces, reduce board space, and reduce power consumption more than 50% from the original 9ZX21501. It is pin-compatible to the 9ZXL1530 and has the output terminations integrated • LP-HCSL outputs; up to 90% IO power reduction, better signal integrity over long traces\n• Direct connect to 85Ω transmission lines; eliminates 60 termination resistors, saves 103mm² area\n• Pin compatible to the 9ZXL1530; easy upgrade to reduced board space\n• 64-VFQFPN package; smallest 15 o;

Renesas

瑞萨

15-output DB1900Z Low-Power Derivative

Features/Benefits • LP-HCSL outputs; up to 90 IO power reduction, better signal integrity over long traces • Direct connect to 85Ω transmission lines; eliminates 60 termination resistors, saves 103mm2 area • Pin compatible to the 9ZXL1530; easy upgrade to reduced board space • 64-VFQFPN pac

文件：496 Kbytes 页数：19 Pages

RENESAS

瑞萨

15-output DB1900Z Low-Power Derivative

Features/Benefits • LP-HCSL outputs; up to 90 IO power reduction, better signal integrity over long traces • Direct connect to 85Ω transmission lines; eliminates 60 termination resistors, saves 103mm2 area • Pin compatible to the 9ZXL1530; easy upgrade to reduced board space • 64-VFQFPN pac

文件：496 Kbytes 页数：19 Pages

RENESAS

瑞萨

15 to 19-Output Buffers for PCIe Gen1–5 and UPI

Features ▪ LP-HCSL outputs eliminate up to 4 resistors per output pair ▪ 9 selectable SMBus addresses ▪ Selectable PLL bandwidths minimizes jitter peaking in cascaded PLL topologies ▪ Hardware/SMBus control of ZDB and FOB modes allow change without power cycle ▪ 8 OE# pins support PCIe CLKR

文件：1.05564 Mbytes 页数：35 Pages

RENESAS

瑞萨

15 to 19-Output Buffers for PCIe Gen1–5 and UPI

Features ▪ LP-HCSL outputs eliminate up to 4 resistors per output pair ▪ 9 selectable SMBus addresses ▪ Selectable PLL bandwidths minimizes jitter peaking in cascaded PLL topologies ▪ Hardware/SMBus control of ZDB and FOB modes allow change without power cycle ▪ 8 OE# pins support PCIe CLKR

文件：1.05564 Mbytes 页数：35 Pages

RENESAS

瑞萨

15-output DB1900Z Low-Power Derivative

文件：301.47 Kbytes 页数：18 Pages

IDT

15-output DB1900Z Low-Power Derivative

文件：301.47 Kbytes 页数：18 Pages

IDT