9ZXL0632E数据手册集成电路（IC）的应用特定时钟/定时规格书PDF

描述 Description

The 9ZXL0632E is a second-generation, enhanced-performance DB800ZL differential buffer. The part is functionally compatible to the 9ZXL0632A, while offering a much improved phase jitter performance. A fixed external feedback maintains low drift for critical QPI/UPI applications. The 9ZXL0632E has an SMBus Write Lockout pin for increased device and system security.

特性 Features

• SMBus write lock feature; increases system security
• PCIe Gen 1–5 compliance
• LP-HCSL outputs; eliminate 12 resistors, save 20mm² of area
• 6 OE# pins; hardware control of each output
• Selectable PLL BW; minimizes jitter peaking in cascaded PLL topologies
• Hardware/SMBus control of PLL bandwidth and bypass; change mode without power cycle
• Spread spectrum compatible; tracks spreading input clock for EMI reduction
• 100MHz PLL Mode; UPI support
• 5 × 5 mm 40-VFQFPN package; small board footprint