EIGHT OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN1, GEN2 AND QPI

General Description The ICS9DB823B is compatible with the Intel DB800Q Differential Buffer Specification. This buffer provides 8 PCI-Express SRC or 8 QPI clocks. The ICS9DB823B is driven by a differential output pair from a CK410B+ or CK509B main clock generator. Recommended Application DB8

文件：482.54 Kbytes 页数：23 Pages

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瑞萨

EIGHT OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN1, GEN2 AND QPI

General Description The ICS9DB823B is compatible with the Intel DB800Q Differential Buffer Specification. This buffer provides 8 PCI-Express SRC or 8 QPI clocks. The ICS9DB823B is driven by a differential output pair from a CK410B+ or CK509B main clock generator. Recommended Application DB8

文件：482.54 Kbytes 页数：23 Pages

RENESAS

瑞萨

EIGHT OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN1, GEN2 AND QPI

General Description The ICS9DB823B is compatible with the Intel DB800Q Differential Buffer Specification. This buffer provides 8 PCI-Express SRC or 8 QPI clocks. The ICS9DB823B is driven by a differential output pair from a CK410B+ or CK509B main clock generator. Recommended Application DB8

文件：482.54 Kbytes 页数：23 Pages

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PLL or bypass mode

Description The 9DB833 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB833 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. Features/Benefits • 3 Selectable SMBus Add

文件：240.58 Kbytes 页数：18 Pages

IDT

EIGHT OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN1–3

Description The 9DB833 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB833 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. Features • 3 selectable SMBus addres

文件：407.82 Kbytes 页数：19 Pages

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瑞萨

EIGHT OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN1–3

• 3 selectable SMBus addresses; multiple devices can share the same SMBus segment • OE# pins; suitable for Express Card applications • PLL or bypass mode; PLL can dejitter incoming clock • Selectable PLL bandwidth; minimizes jitter peaking in downstream PLLs • Spread spectrum compatible; tra

文件：375.65 Kbytes 页数：19 Pages

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SMBus Interface; unused outputs can be disabled

Description The 9DB833 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB833 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. Features/Benefits • 3 Selectable SMBus Add

文件：240.58 Kbytes 页数：18 Pages

ICST

EIGHT OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN1–3

• 3 selectable SMBus addresses; multiple devices can share the same SMBus segment • OE# pins; suitable for Express Card applications • PLL or bypass mode; PLL can dejitter incoming clock • Selectable PLL bandwidth; minimizes jitter peaking in downstream PLLs • Spread spectrum compatible; tra

文件：375.65 Kbytes 页数：19 Pages

RENESAS

瑞萨

EIGHT OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN1–3

• 3 selectable SMBus addresses; multiple devices can share the same SMBus segment • OE# pins; suitable for Express Card applications • PLL or bypass mode; PLL can dejitter incoming clock • Selectable PLL bandwidth; minimizes jitter peaking in downstream PLLs • Spread spectrum compatible; tra

文件：375.65 Kbytes 页数：19 Pages

RENESAS

瑞萨

EIGHT OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN1–3

• 3 selectable SMBus addresses; multiple devices can share the same SMBus segment • OE# pins; suitable for Express Card applications • PLL or bypass mode; PLL can dejitter incoming clock • Selectable PLL bandwidth; minimizes jitter peaking in downstream PLLs • Spread spectrum compatible; tra

文件：375.65 Kbytes 页数：19 Pages

RENESAS

瑞萨