丝印：8521；Package：SOT23-5；OPERATION INSTRUCTION

文件：1.97588 Mbytes 页数：17 Pages

COREBAI

芯佰微

丝印：211AI01L；Package：SOIC；Low Skew, 1-to-2 Differential-to-HSTL Fanout Buffer

FEATURES • Two differential HSTL compatible outputs • One differential CLK, nCLK input pair • CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, HSTL, SSTL, HCSL • Maximum output frequency: 700MHz • Translates any single-ended input signal to HSTL levels with r

文件：299.04 Kbytes 页数：15 Pages

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瑞萨

丝印：211AI01L；Package：SOIC；Low Skew, 1-to-2 Differential-to-HSTL Fanout Buffer

FEATURES • Two differential HSTL compatible outputs • One differential CLK, nCLK input pair • CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, HSTL, SSTL, HCSL • Maximum output frequency: 700MHz • Translates any single-ended input signal to HSTL levels with r

文件：299.04 Kbytes 页数：15 Pages

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瑞萨

丝印：211BI03N；Package：SOIC；Low Skew, 1-to-2, Differential-to-LVHSTL Fanout Buffer

Features • Two differential LVHSTL compatible outputs • One differential CLK, nCLK input pair • CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL • Maximum output frequency: 700MHz • Translates any single ended input signal to LVHSTL levels w

文件：489.14 Kbytes 页数：16 Pages

RENESAS

瑞萨

丝印：211BI03N；Package：SOIC；Low Skew, 1-to-2, Differential-to-LVHSTL Fanout Buffer

Features • Two differential LVHSTL compatible outputs • One differential CLK, nCLK input pair • CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL • Maximum output frequency: 700MHz • Translates any single ended input signal to LVHSTL levels w

文件：489.14 Kbytes 页数：16 Pages

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瑞萨

丝印：ICS8521AYI03N；Package：LQFP；Low Skew, 1-to-9 Differential-to-LVHSTL Fanout Buffer

FEATURES • 9 LVHSTL outputs • Redundant differential CLK0, nCLK0 and CLK1, nCLK1 inputs • CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Maximum output frequency: 500MHz • Output skew: 50ps (maximum) • Part-to-part skew: 250ps (maxim

文件：474.82 Kbytes 页数：18 Pages

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瑞萨

丝印：ICS8521AYI03N；Package：LQFP；Low Skew, 1-to-9 Differential-to-LVHSTL Fanout Buffer

FEATURES • 9 LVHSTL outputs • Redundant differential CLK0, nCLK0 and CLK1, nCLK1 inputs • CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Maximum output frequency: 500MHz • Output skew: 50ps (maximum) • Part-to-part skew: 250ps (maxim

文件：474.82 Kbytes 页数：18 Pages

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COAXIAL CONNECTOR, SK, 50 Ohm, Straight cable plug (male)

Properties • The shortened male pin ensures a non-destructive mating process • Particularly well suited for semi-rigid, semi-flex and flexible cable • Mechanical intermateable with SMA and PC 3.5 (3.5 mm standard)

文件：255.19 Kbytes 页数：2 Pages

HUBERSUHNER

LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVHSTL FANOUT BUFFER

GENERAL DESCRIPTION The ICS85211I is a low skew, high performance 1-to-2 Differential-to-LVHSTL Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The CLK, nCLK pair can accept most standard differential input levels.The ICS85211I is characterized

文件：106.79 Kbytes 页数：12 Pages

ICST

Low Skew, 1-to-2, Differential-to-LVHSTL Fanout Buffer

Features • Two differential LVHSTL compatible outputs • One differential CLK, nCLK input pair • CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL • Maximum output frequency: 700MHz • Translates any single ended input signal to LVHSTL levels w

文件：489.14 Kbytes 页数：16 Pages

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