丝印：85411AIL；Package：SOIC；Low Skew, 1-to-2 Differential-to-LVDS Fanout Buffer

FEATURES • Two differential LVDS outputs • One differential CLK, nCLK clock input • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Maximum output frequency: 650MHz • Translates any single ended input signal to LVDS levels with resistor

文件：386.46 Kbytes 页数：16 Pages

RENESAS

瑞萨

丝印：85411AIL；Package：SOIC；Low Skew, 1-to-2 Differential-to-LVDS Fanout Buffer

FEATURES • Two differential LVDS outputs • One differential CLK, nCLK clock input • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Maximum output frequency: 650MHz • Translates any single ended input signal to LVDS levels with resistor

文件：386.46 Kbytes 页数：16 Pages

RENESAS

瑞萨

丝印：85411AIL；Package：SOIC；Low Skew, 1-to-2 Different ial-to-LVDS Fanout Buffer

文件：228.99 Kbytes 页数：15 Pages

IDT

丝印：85411AIL；Package：SOIC；Low Skew, 1-to-2 Different ial-to-LVDS Fanout Buffer

文件：228.99 Kbytes 页数：15 Pages

IDT