Dual 2-input OR gate

The 74LVC2G32 provides a 2-input OR gate function.\n Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.\n This device is fully specified for partial power-down applications using IOFF. The IOF • Wide supply voltage range from 1.65 V to 5.5 V\n• 5 V tolerant outputs in the Power-down mode\n• High noise immunity\n• ±24 mA output drive (VCC = 3.0 V)\n• CMOS low power consumption\n• Complies with JEDEC standard:• JESD8-7 (1.65 V to 1.95 V)\n• JESD8-5 (2.3 V to 2.7 V)\n• JESD8-B/JESD36 (2.7 V ;

Nexperia

安世

丝印：VG；Package：SOT1233-2；Dual 2-input OR gate

1. General description The 74LVC2G32 is a dual 2-input OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input

文件：287.18 Kbytes 页数：18 Pages

NEXPERIA

安世

Package：8-XFDFN 裸露焊盘；包装：卷带（TR） 类别：集成电路（IC） 门和反相器 描述：IC GATE OR 2CH 2-INP 8X2SON

Nexperia USA Inc.

Dual 2-input OR Gate

文件：1.98048 Mbytes 页数：8 Pages

RENESAS

瑞萨

Dual 2-input OR Gate

文件：1.98048 Mbytes 页数：8 Pages

RENESAS

瑞萨

DUAL 2 INPUT POSITIVE-OR GATE

文件：319.81 Kbytes 页数：12 Pages

TI

德州仪器