Dual non-inverting Schmitt-trigger with 5 V tolerant input

DESCRIPTION The 74LVC2G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. These feature allows the use of these devices as translators in a mixed 3.3 V and 5 V en

文件：96.61 Kbytes 页数：17 Pages

PHI

PHI

丝印：VV；Package：SOT886；Dual non-inverting Schmitt trigger with 5 V tolerant input

1. General description The 74LVC2G17 is a dual buffer with Schmitt-trigger inputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. This device is fully specified for partial power down appli

文件：258.3 Kbytes 页数：17 Pages

NEXPERIA

安世

丝印：VV；Package：SOT1115；Dual non-inverting Schmitt trigger with 5 V tolerant input

1. General description The 74LVC2G17 is a dual buffer with Schmitt-trigger inputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. This device is fully specified for partial power down appli

文件：258.3 Kbytes 页数：17 Pages

NEXPERIA

安世

丝印：VV；Package：SOT1202；Dual non-inverting Schmitt trigger with 5 V tolerant input

1. General description The 74LVC2G17 is a dual buffer with Schmitt-trigger inputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. This device is fully specified for partial power down appli

文件：258.3 Kbytes 页数：17 Pages

NEXPERIA

安世

Dual non-inverting Schmitt-trigger with 5 V tolerant input

DESCRIPTION The 74LVC2G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 or 5 V devices. These feature allows the use of these devices as translators in a mixed 3.3 and 5 V enviro

文件：84 Kbytes 页数：16 Pages

ICST

Dual non-inverting Schmitt-trigger with 5 V tolerant input

DESCRIPTION The 74LVC2G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. These feature allows the use of these devices as translators in a mixed 3.3 V and 5 V en

文件：96.61 Kbytes 页数：17 Pages

PHI

PHI

Dual non-inverting Schmitt trigger with 5 V tolerant input

General description The 74LVC2G17 provides two non-inverting buffers with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. Features and benefits ■ Wide supply voltage range from 1.65 V to 5.5 V ■ 5 V toler

文件：98.53 Kbytes 页数：16 Pages

恩XP

丝印：VV；Package：SOT457；Dual non-inverting Schmitt trigger with 5 V tolerant input

1. General description The 74LVC2G17 is a dual buffer with Schmitt-trigger inputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. This device is fully specified for partial power down appli

文件：258.3 Kbytes 页数：17 Pages

NEXPERIA

安世

丝印：VV；Package：SC-74；Dual non-inverting Schmitt trigger with 5 V tolerant input

1. General description The 74LVC2G17-Q100 is a dual buffer with Schmitt-trigger inputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. This device is fully specified for partial power down

文件：225.63 Kbytes 页数：13 Pages

NEXPERIA

安世

Dual non-inverting Schmitt-trigger with 5 V tolerant input

DESCRIPTION The 74LVC2G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 or 5 V devices. These feature allows the use of these devices as translators in a mixed 3.3 and 5 V enviro

文件：84 Kbytes 页数：16 Pages

ICST