Single D-type flip-flop; positive-edge trigger

1. General description The 74LVC1G80-Q100 is a single positive-edge triggered D-type flip-flop. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and its complement will appear at the Q output. Inputs can be

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Single D-type flip-flop; positive-edge trigger

1. General description The 74LVC1G80-Q100 is a single positive-edge triggered D-type flip-flop. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and its complement will appear at the Q output. Inputs can be

文件：252.86 Kbytes 页数：15 Pages

NEXPERIA

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丝印：V80；Package：SC-74A；Single D-type flip-flop; positive-edge trigger

文件：796 Kbytes 页数：15 Pages

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丝印：VT；Package：TSSOP5；Single D-type flip-flop; positive-edge trigger

文件：796 Kbytes 页数：15 Pages

NEXPERIA

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Single D-type flip-flop; positive-edge trigger

文件：796 Kbytes 页数：15 Pages

NEXPERIA

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Single D-type flip-flop; positive-edge trigger

DESCRIPTION\nThe 74LVC1G80 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.\nInputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment.FEATURES\n• W • Wide supply voltage range from 1.65 V to 5.5 V\n• High noise immunity\n• Complies with JEDEC standard:\n   – JESD8-7 (1.65 V to 1.95 V)\n   – JESD8-5 (2.3 V to 2.7 V)\n   – JESD8B/JESD36 (2.7 V to 3.6 V).\n• ±24 mA output drive (VCC = 3.0 V)\n• ESD protection:\n   – HBM EIA/JESD22-A114-B exceeds 2;

Panasonic

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Single D-type flip-flop; positive-edge trigger

The 74LVC1G80 provides a single positive-edge triggered D-type flip-flop.\n Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock pulse. The input pin D must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable opera • Wide supply voltage range from 1.65 V to 5.5 V\n• High noise immunity\n• Complies with JEDEC standard:• JESD8-7 (1.65 V to 1.95 V)\n• JESD8-5 (2.3 V to 2.7 V)\n• JESD8B/JESD36 (2.7 V to 3.6 V)\n\n• ESD protection:• HBM JESD22-A114F exceeds 2000 V\n• MM JESD22-A115-A exceeds 200 V\n\n• ±24 mA outpu;

Nexperia

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Package：6-XFDFN；包装：管件 功能：标准 类别：集成电路（IC） 触发器 描述：IC FF D-TYPE SNGL 1BIT 6XSON

Nexperia USA Inc.

Package：6-XFDFN；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 功能：标准 类别：集成电路（IC） 触发器 描述：IC FF D-TYPE SNGL 1BIT 6XSON

Nexperia USA Inc.

Package：6-XFDFN；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 功能：标准 类别：集成电路（IC） 触发器 描述：IC FF D-TYPE SNGL 1BIT 6XSON

Nexperia USA Inc.