74LVC1G80GW-Q100

Single D-type flip-flop; positive-edge trigger

The 74LVC1G80-Q100 provides a single positive-edge triggered D-type flip-flop.\n Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock pulse. The input pin D must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable ; • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• Wide supply voltage range from 1.65 V to 5.5 V\n• High noise immunity\n• Complies with JEDEC standard:• JESD8-7 (1.65 V to 1.95 V)\n• JESD8-5 (2.3 V to 2.7 V)\n• ;

74LVC1G80GW-Q100

丝印：VT；Package：TSSOP5；Single D-type flip-flop; positive-edge trigger

1.Generaldescription The74LVC1G80-Q100isasinglepositive-edgetriggeredD-typeflip-flop.DataattheD-inputthat meetstheset-upandholdtimerequirementsontheLOW-to-HIGHclocktransitionwillbestoredin theflip-flopanditscomplementwillappearattheQoutput.Inputscanbe

74LVC1G80GW-Q100

丝印：VT；Package：TSSOP5；Single D-type flip-flop; positive-edge trigger

74LVC1G80GW-Q100,1

Package：5-TSSOP，SC-70-5，SOT-353；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 功能：标准 类别：集成电路（IC） 触发器 描述：IC FF D-TYPE SNGL 1BIT 5TSSOP

74LVC1G86GV

NXP
SOT23

恩XP