Single 2-input OR gate

General description The 74LVC1G32 is a single 2-input OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input ri

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NEXPERIA

安世

SINGLE 2 INPUT POSITIVE OR GATE

Features  Grade 1 Ambient Temperature Operation: -40°C to +125°C  Wide Supply Voltage Range from 1.65V to 5.5V  ±24mA Output Drive at 3.3V  CMOS Low Power Consumption  IOFF Supports Partial-Power-Down Mode Operation  Inputs Accept up to 5.5V Regardless of VCC Level  ESD Protection Te

文件：520.98 Kbytes 页数：9 Pages

DIODES

美台半导体

Single 2-input OR gate

1. General description The 74LVC1G32-Q100 is a single 2-input OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slowe

文件：217.28 Kbytes 页数：12 Pages

NEXPERIA

安世

Single 2-input OR gate

1. General description The 74LVC1G32-Q100 is a single 2-input OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slowe

文件：242.86 Kbytes 页数：14 Pages

NEXPERIA

安世

Single 2-input OR gate

1. General description The 74LVC1G32-Q100 is a single 2-input OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slowe

文件：242.86 Kbytes 页数：14 Pages

NEXPERIA

安世

SN74LVC1G32-Q1 Single 2-input positive-OR gate

1 Features • Available in the small 1.45 mm2 Package (DRY) with 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5-V • Supports Down Translation to VCC • Max tpd of 3.6 ns at 3.3-V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3-V • Ioff Supports

文件：1.63668 Mbytes 页数：28 Pages

TI

德州仪器

SN74LVC1G32-Q1 Single 2-input positive-OR gate

1 Features • Available in the small 1.45 mm2 Package (DRY) with 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5-V • Supports Down Translation to VCC • Max tpd of 3.6 ns at 3.3-V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3-V • Ioff Supports

文件：1.63668 Mbytes 页数：28 Pages

TI

德州仪器

SN74LVC1G32-Q1 Single 2-input positive-OR gate

1 Features 1• Available in the small 1.45 mm2 Package (DRY) with 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5-V • Supports Down Translation to VCC • Max tpd of 3.6 ns at 3.3-V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3-V • Ioff Support

文件：1.63473 Mbytes 页数：28 Pages

TI

德州仪器

丝印：UWQ；Package：SOT353；SINGLE 2 INPUT POSITIVE OR GATE

Features  Grade 1 Ambient Temperature Operation: -40°C to +125°C  Wide Supply Voltage Range from 1.65V to 5.5V  ±24mA Output Drive at 3.3V  CMOS Low Power Consumption  IOFF Supports Partial-Power-Down Mode Operation  Inputs Accept up to 5.5V Regardless of VCC Level  ESD Protection Te

文件：520.98 Kbytes 页数：9 Pages

DIODES

美台半导体

丝印：UWQ；Package：SOT25；SINGLE 2 INPUT POSITIVE OR GATE

Features  Grade 1 Ambient Temperature Operation: -40°C to +125°C  Wide Supply Voltage Range from 1.65V to 5.5V  ±24mA Output Drive at 3.3V  CMOS Low Power Consumption  IOFF Supports Partial-Power-Down Mode Operation  Inputs Accept up to 5.5V Regardless of VCC Level  ESD Protection Te

文件：520.98 Kbytes 页数：9 Pages

DIODES

美台半导体