BCD to 7-segment latch/decoder/driver for LCDs

GENERAL DESCRIPTION The 74HC/HCT4543 are high-speed Si-gate CMOS devices and are pin compatible with “4543” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. FEATURES • Latch storage of inputs • Blanking inputs • Output capability: non-standard

文件：78.42 Kbytes 页数：11 Pages

PHI

PHI

Dual 4-bit synchronous binary counter

文件：226.74 Kbytes 页数：13 Pages

NEXPERIA

安世

Dual 4-bit synchronous binary counter

文件：226.74 Kbytes 页数：13 Pages

NEXPERIA

安世

High Speed CMOS Logic Dual Retriggerable Precision Monostable Multivibrator

文件：64.11 Kbytes 页数：11 Pages

TI

德州仪器

DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATOR

文件：477.16 Kbytes 页数：10 Pages

TOSHIBA

东芝

4-to-16 line decoder/demultiplexer with input latches

The 74HC4514; 74HCT4514 is a 4-to-16 line decoder/demultiplexer having four binary weighted address inputs (A0 to A3), with latches, a latch enable input (LE), an enable input (E) and 16 outputs (Q0 to Q15). When LE is HIGH, the selected output is determined by the data on An. When LE goes LOW, the • Input levels:• For 74HC4514: CMOS level\n• For 74HCT4514: TTL level\n\n• 16-line demultiplexing capability\n• Decodes 4 binary-coded inputs into 16 mutually-exclusive outputs\n• Complies with JEDEC standard no. 7 A\n• ESD protection:• HBM JESD22-A114F exceeds 2000 V\n• MM JESD22-A115-A exceeds 200;

Nexperia

安世

4-to-16 line decoder/demultiplexer with input latches

The 74HC4514; 74HCT4514 is a 4-to-16 line decoder/demultiplexer having four binary weighted address inputs (A0 to A3), with latches, a latch enable input (LE), an enable input (E) and 16 outputs (Q0 to Q15). When LE is HIGH, the selected output is determined by the data on An. When LE goes LOW, the • Input levels:• For 74HC4514: CMOS level\n• For 74HCT4514: TTL level\n\n• 16-line demultiplexing capability\n• Decodes 4 binary-coded inputs into 16 mutually-exclusive outputs\n• Complies with JEDEC standard no. 7 A\n• ESD protection:• HBM JESD22-A114F exceeds 2000 V\n• MM JESD22-A115-A exceeds 200;

Nexperia

安世

4-to-16 line decoder/demultiplexer with input latches

The 74HC4514; 74HCT4514 is a 4-to-16 line decoder/demultiplexer having four binary weighted address inputs (A0 to A3), with latches, a latch enable input (LE), an enable input (E) and 16 outputs (Q0 to Q15). When LE is HIGH, the selected output is determined by the data on An. When LE goes LOW, the • Input levels:• For 74HC4514: CMOS level\n• For 74HCT4514: TTL level\n\n• 16-line demultiplexing capability\n• Decodes 4 binary-coded inputs into 16 mutually-exclusive outputs\n• Complies with JEDEC standard no. 7 A\n• ESD protection:• HBM JESD22-A114F exceeds 2000 V\n• MM JESD22-A115-A exceeds 200;

Nexperia

安世

Package：16-SOIC（0.154"，3.90mm 宽）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 显示驱动器 描述：IC DRVR 7 SEGMENT 16SO

Nexperia USA Inc.

Package：24-SOIC（0.295"，7.50mm 宽）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 信号开关，多路复用器，解码器 描述：IC DECODER/DEMUX 1X4:16 24SO

Nexperia USA Inc.