74HC4514DB

4-to-16 line decoder/demultiplexer with input latches; • Input levels:• For 74HC4514: CMOS level\n• For 74HCT4514: TTL level\n\n• 16-line demultiplexing capability\n• Decodes 4 binary-coded inputs into 16 mutually-exclusive outputs\n• Complies with JEDEC standard no. 7 A\n• ESD protection:• HBM JESD22-A114F exceeds 2000 V\n• MM JESD22-A115-A exceeds 200 V\n\n• Multiple package options\n• Specified from -40 °C to +85 °C and -40 °C to +125 °C\n;

The 74HC4514; 74HCT4514 is a 4-to-16 line decoder/demultiplexer having four binary weighted address inputs (A0 to A3), with latches, a latch enable input (LE), an enable input (E) and 16 outputs (Q0 to Q15). When LE is HIGH, the selected output is determined by the data on An. When LE goes LOW, the last data present at An are stored in the latches and the outputs remain stable. When E is LOW, the selected output, determined by the contents of the latch, is HIGH. At E HIGH, all outputs are LOW. The enable input E does not affect the state of the latch. When the device is used as a demultiplexer, E is the data input and A0 to A3 are the address inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.\n The 74HCT4514 features reduced input threshold levels to allow interfacing to TTL logic levels.\n

74HC4514DB,112

Package：24-SSOP（0.209"，5.30mm 宽）；包装：托盘 类别：集成电路（IC） 信号开关，多路复用器，解码器 描述：IC DECODER/DEMUX 1X4:16 24SSOP

ETC

74HC4514DB,118

Package：24-SSOP（0.209"，5.30mm 宽）；包装：托盘 类别：集成电路（IC） 信号开关，多路复用器，解码器 描述：IC DECODER/DEMUX 1X4:16 24SSOP

ETC

74HC4514N

4-to-16linedecoder/demultiplexerwithinputlatches

The74HC/HCT4514are4-to-16linedecoders/demultiplexershavingfourbinaryweightedaddressinputs(A0toA3),withlatches,alatchenableinput(LE),andanactiveLOWenableinput(E). The16outputs(Q0toQ15)aremutuallyexclusiveactiveHIGH.WhenLEisHIGH,theselectedoutputisde

PHI

74HC4514PW

4-to-16linedecoder/demultiplexerwithinputlatches

1.Generaldescription The74HC4514;74HCT4514isa4-to-16linedecoder/demultiplexerhavingfourbinaryweighted addressinputs(A0toA3),withlatches,alatchenableinput(LE),anenableinput(E)and 16outputs(Q0toQ15).WhenLEisHIGH,theselectedoutputisdeterminedbythedatao

CD74HC4514

High-SpeedCMOSLogic4-to16-LineDecoder/DemultiplexerwithInputLatches