Triple 3-input NOR gate

文件：241.89 Kbytes 页数：12 Pages

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Triple 3-input NOR gate

文件：703.84 Kbytes 页数：15 Pages

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Triple 3-input NOR gate

文件：241.89 Kbytes 页数：12 Pages

NEXPERIA

安世

Triple 3-input NOR gate

文件：703.84 Kbytes 页数：15 Pages

NEXPERIA

安世

Triple 3-input NOR gate

文件：241.89 Kbytes 页数：12 Pages

NEXPERIA

安世

Triple 3-input NOR gate

文件：703.84 Kbytes 页数：15 Pages

NEXPERIA

安世

Triple 3-input NOR gate

文件：703.84 Kbytes 页数：15 Pages

NEXPERIA

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Octal D Flip-Flop with Common Clock and Reset

The SL74HC273 is identical in pinout to the LS/ALS273. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. This device consists of eight D flip-flops with common Clock and Reset inputs. Each flip-flop is loaded with a low-to

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Octal D-type flip-flop with reset; positive-edge trigger

The 74HC273; 74HCT273 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and master reset (MR) inputs. The outputs Qn will assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A L • Input levels:• For 74HC273: CMOS level\n• For 74HCT273: TTL level\n\n• Common clock and master reset\n• Eight positive edge-triggered D-type flip-flops\n• Complies with JEDEC standard no. 7A\n• ESD protection:• HBM JESD22-A114F exceeds 2000 V\n• MM JESD22-A115-A exceeds 200 V\n\n• Multiple package;

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8 位 D 型清零端触发器

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