Dual 4-input NAND gate

GENERAL DESCRIPTION The 74HC/HCT20 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT20 provide the 4-input NAND function. FEATURES • Output capability: standard • I

文件：34.8 Kbytes 页数：6 Pages

PHI

PHI

High Speed CMOS Logic

Features High Speed: tPD = 11ns @ 6V (Typ.) Low Input Current: 1μA Output Drive Capability: 10 LSTTL loads Operating Voltage Range: 2V to 6V CMOS High Noise Immunity Function compatible with 74LS20.

文件：328.44 Kbytes 页数：5 Pages

SS

Dual 4-input NAND gate

1. General description The 74HC20 is a dual 4-input NAND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Wide supply voltage range from 2.0 V to 6.0 V • CMOS low power dissipatio

文件：217.23 Kbytes 页数：11 Pages

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High Speed CMOS Logic

Features High Speed: tPD = 11ns @ 6V (Typ.) Low Input Current: 1μA Output Drive Capability: 10 LSTTL loads Operating Voltage Range: 2V to 6V CMOS High Noise Immunity Function compatible with 74LS20.

文件：328.44 Kbytes 页数：5 Pages

SS

Dual 4-input NAND gate

GENERAL DESCRIPTION The 74HC/HCT20 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT20 provide the 4-input NAND function. FEATURES • Output capability: standard • I

文件：34.8 Kbytes 页数：6 Pages

PHI

PHI

Dual 4-input NAND gate

1. General description The 74HC20 is a dual 4-input NAND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Wide supply voltage range from 2.0 V to 6.0 V • CMOS low power dissipatio

文件：217.23 Kbytes 页数：11 Pages

NEXPERIA

安世

Dual 4-input NAND gate

GENERAL DESCRIPTION The 74HC/HCT20 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT20 provide the 4-input NAND function. FEATURES • Output capability: standard • I

文件：34.8 Kbytes 页数：6 Pages

PHI

PHI

Dual 4-input NAND gate

1. General description The 74HC20 is a dual 4-input NAND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Wide supply voltage range from 2.0 V to 6.0 V • CMOS low power dissipatio

文件：217.23 Kbytes 页数：11 Pages

NEXPERIA

安世

Dual 4-input AND gate

1. General description The 74HC21 is a dual 4-input AND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Wide supply voltage range from 2.0 to 6.0 V • CMOS low power dissipation

文件：223.74 Kbytes 页数：11 Pages

NEXPERIA

安世

Dual 4-input AND gate

General description The 74HC21 is a dual 4-input AND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

文件：192.06 Kbytes 页数：11 Pages

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