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74F109

Dual JK Positive Edge-Triggered Flip-Flop

General Description The F109 consists of two high-speed, completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D-type flip-flop (refer to F74 data sheet) by connecting the J

文件:79.72 Kbytes 页数:7 Pages

Fairchild

仙童半导体

74F109

Positive J-K positive edge-triggered flip-flops

DESCRIPTION The 74F109 is a dual positive edge-triggered JK-type flip-flop featuring individual J, K, clock, set, and reset inputs; also true and complementary outputs. Set (SD) and reset (RD) are asynchronous active low inputs and operate independently of the clock (CP) input. The J and K are

文件:85.03 Kbytes 页数:10 Pages

PHI

飞利浦

PHI

74F109

Dual JK Positive Edge-Triggered Flip-Flop

文件:80.64 Kbytes 页数:7 Pages

Fairchild

仙童半导体

74F109

Positive J-K positive edge-triggered flip-flops

DESCRIPTION\nThe 74F109 is a dual positive edge-triggered JK-type flip-flop featuring individual J, K, clock, set, and reset inputs; also true and complementary outputs. Set (SD) and reset (RD) are asynchronous active low inputs and operate independently of the clock (CP) input. The J and K are edge

恩XP

恩XP

74F109

Dual JK Positive Edge-Triggered Flip-Flop

ONSEMI

安森美半导体

74F109PC

Dual JK Positive Edge-Triggered Flip-Flop

General Description The F109 consists of two high-speed, completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D-type flip-flop (refer to F74 data sheet) by connecting the J

文件:79.72 Kbytes 页数:7 Pages

Fairchild

仙童半导体

74F109SC

Dual JK Positive Edge-Triggered Flip-Flop

General Description The F109 consists of two high-speed, completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D-type flip-flop (refer to F74 data sheet) by connecting the J

文件:79.72 Kbytes 页数:7 Pages

Fairchild

仙童半导体

74F109SJ

Dual JK Positive Edge-Triggered Flip-Flop

General Description The F109 consists of two high-speed, completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D-type flip-flop (refer to F74 data sheet) by connecting the J

文件:79.72 Kbytes 页数:7 Pages

Fairchild

仙童半导体

74F109_00

Dual JK Positive Edge-Triggered Flip-Flop

文件:80.64 Kbytes 页数:7 Pages

Fairchild

仙童半导体

74F109PC

Dual JK Positive Edge-Triggered Flip-Flop

文件:80.64 Kbytes 页数:7 Pages

Fairchild

仙童半导体

详细参数

  • 型号:

    74F109

  • 制造商:

    FAIRCHILD

  • 制造商全称:

    Fairchild Semiconductor

  • 功能描述:

    Dual JK Positive Edge-Triggered Flip-Flop

供应商型号品牌批号封装库存备注价格
TI
24+
DIP
25843
公司原厂原装现货假一罚十!特价出售!强势库存!
询价
24+
5000
公司存货
询价
FAIRCHILD
24+
SOIC-16
25000
一级专营品牌全新原装热卖
询价
FAIR
23+
NA
9856
原装正品,假一罚百!
询价
FAIRCHILD/仙童
24+
SOP3.9
60
大批量供应优势库存热卖
询价
TI
24+
DIP
6540
原装现货/欢迎来电咨询
询价
FAIRCHILD/仙童
2447
DIP
100500
一级代理专营品牌!原装正品,优势现货,长期排单到货
询价
TI/德州仪器
23+
50000
全新原装正品现货,支持订货
询价
Fairchild
25+
21
公司优势库存 热卖中!!
询价
TI
2019
原厂原装
454
一级代理,专注军工、汽车、医疗、工业、新能源、电力
询价
更多74F109供应商 更新时间2025-12-24 8:58:00