Package：16-SOIC（0.154"，3.90mm 宽）；包装：管件 功能：设置（预设）和复位 类别：集成电路（IC） 触发器 描述：IC FF JK TYPE DUAL 1BIT 16SOIC

ONSEMI

安森美半导体

Dual JK Negative Edge-Triggered Flip-Flop

General Description The 74F112 contains two independent, high-speed JK flip flops with Direct Set and Clear inputs. Synchronous state changes are initiated by the falling edge of the clock. Triggering occurs at a voltage level of the clock and is not directly related to the transition time. The J

文件：59.07 Kbytes 页数：6 Pages

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司

Dual JK Negative Edge-Triggered Flip-Flop

文件：83.34 Kbytes 页数：7 Pages

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司

Dual J-K negative edge-triggered flip-flop

DESCRIPTION The 74F112, Dual Negative Edge-Triggered JK-Type Flip-Flop, feature individual J, K, Clock (CPn), Set (SD) and Reset (RD) inputs, true (Qn) and complementary (Qn) outputs. The SD and RD inputs, when Low, set or reset the outputs as shown in the Function Table, regardless of the level

文件：83.94 Kbytes 页数：10 Pages

PHI

飞利浦