74ALVCH245WM数据手册集成电路（IC）的缓冲器驱动器接收器收发器规格书PDF

描述 Description

General Description
The ALVCH245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus oriented applications. The T/R input determines the direction of data flow. The OE input disables both the A and B Ports by placing them in a high impedance state. The ALVCH245 data inputs include active bushold circuitry, eliminating the need for external pull-up resistors to hold unused or floating data inputs at a valid logic level.

特性 Features

■ 1.65V to 3.6V VCC supply operation
■ Bushold on data inputs eliminates the need for external pull-up/pull-down resistors
■ tPD
3.6 ns max for 3.0V to 3.6V VCC
4.2 ns max for 2.3V to 2.7V VCC
6 ns max for 1.65V to 1.95V VCC
■ Uses patented Quiet Series noise/EMI reduction circuitry
■ Latchup conforms to JEDEC JED78
■ ESD performance:
Human body model 2000V
Machine model 200V

简介

74ALVCH245WM属于集成电路（IC）的缓冲器驱动器接收器收发器。由制造生产的74ALVCH245WM缓冲器，驱动器，接收器，收发器逻辑缓冲器、驱动器、接收器和收发器允许隔离对某个电路的逻辑信号的访问，以用于另一电路。缓冲器将其输入信号（不变或反相）传递到其输出，并可能用于清除弱信号或驱动负载。在布尔逻辑仿真器中，缓冲器主要用于增加传播延迟。逻辑接收器和收发器允许在数据总线之间进行隔离通信。