3.3V 64K x 16 Bit Asynchronous Static RAM

The 71V016 3.3V CMOS SRAM is organized as 64K x 16. All bidirectional inputs and outputs of the 71V016 are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation. • Equal access and cycle times — Commercial: 10/12/15/20ns — Industrial: 12/15/20ns\n• Bidirectional data inputs and outputs directly LVTTL-compatible\n• Upper and Lower Byte Enable Pins\n• Available in 44-pin Plastic SOJ, 44-pin TSOP, and 48-Ball Plastic FBGA packages;

Renesas

瑞萨

3.3V CMOS Static RAM 1 Meg (64K x 16-Bit)

Description The IDT71V016 is a 1,048,576-bit high-speed Static RAM organized as 64K x 16. It is fabricated using IDT’s high-perfomance, high-reliability CMOS technology. This state-of-the-art technology, combined with inno vative circuit design techniques, provides a cost-effective solution for

文件：100.78 Kbytes 页数：9 Pages

IDT

3.3V CMOS Static RAM 1 Meg (64K x 16-Bit)

Features ◆ 64K x 16 advanced high-speed CMOS Static RAM ◆ Equal access and cycle times — Commercial: 10/12/15/20ns — Industrial: 10/12/15/20ns ◆ One Chip Select plus one Output Enable pin ◆ Bidirectional data inputs and outputs directly LVTTL-compatible ◆ Low power consumption via chip des

文件：210.22 Kbytes 页数：11 Pages

RENESAS

瑞萨

3.3V CMOS Static RAM 1 Meg (64K x 16-Bit)

Features ◆ 64K x 16 advanced high-speed CMOS Static RAM ◆ Equal access and cycle times — Commercial: 10/12/15/20ns — Industrial: 10/12/15/20ns ◆ One Chip Select plus one Output Enable pin ◆ Bidirectional data inputs and outputs directly LVTTL-compatible ◆ Low power consumption via chip des

文件：210.22 Kbytes 页数：11 Pages

RENESAS

瑞萨

3.3V CMOS Static RAM 1 Meg (64K x 16-Bit)

Features ◆ 64K x 16 advanced high-speed CMOS Static RAM ◆ Equal access and cycle times — Commercial: 10/12/15/20ns — Industrial: 10/12/15/20ns ◆ One Chip Select plus one Output Enable pin ◆ Bidirectional data inputs and outputs directly LVTTL-compatible ◆ Low power consumption via chip des

文件：210.22 Kbytes 页数：11 Pages

RENESAS

瑞萨

3.3V CMOS Static RAM 1 Meg (64K x 16-Bit)

Features ◆ 64K x 16 advanced high-speed CMOS Static RAM ◆ Equal access and cycle times — Commercial: 10/12/15/20ns — Industrial: 10/12/15/20ns ◆ One Chip Select plus one Output Enable pin ◆ Bidirectional data inputs and outputs directly LVTTL-compatible ◆ Low power consumption via chip des

文件：210.22 Kbytes 页数：11 Pages

RENESAS

瑞萨

3.3V CMOS Static RAM 1 Meg (64K x 16-Bit)

Features ◆ 64K x 16 advanced high-speed CMOS Static RAM ◆ Equal access and cycle times — Commercial: 10/12/15/20ns — Industrial: 10/12/15/20ns ◆ One Chip Select plus one Output Enable pin ◆ Bidirectional data inputs and outputs directly LVTTL-compatible ◆ Low power consumption via chip des

文件：210.22 Kbytes 页数：11 Pages

RENESAS

瑞萨

3.3V CMOS Static RAM 1 Meg (64K x 16-Bit)

Features ◆ 64K x 16 advanced high-speed CMOS Static RAM ◆ Equal access and cycle times — Commercial: 10/12/15/20ns — Industrial: 10/12/15/20ns ◆ One Chip Select plus one Output Enable pin ◆ Bidirectional data inputs and outputs directly LVTTL-compatible ◆ Low power consumption via chip des

文件：210.22 Kbytes 页数：11 Pages

RENESAS

瑞萨

3.3V CMOS Static RAM 1 Meg (64K x 16-Bit)

Features ◆ 64K x 16 advanced high-speed CMOS Static RAM ◆ Equal access and cycle times — Commercial: 10/12/15/20ns — Industrial: 10/12/15/20ns ◆ One Chip Select plus one Output Enable pin ◆ Bidirectional data inputs and outputs directly LVTTL-compatible ◆ Low power consumption via chip des

文件：210.22 Kbytes 页数：11 Pages

RENESAS

瑞萨

3.3V CMOS Static RAM 1 Meg (64K x 16-Bit)

Features ◆ 64K x 16 advanced high-speed CMOS Static RAM ◆ Equal access and cycle times — Commercial: 10/12/15/20ns — Industrial: 10/12/15/20ns ◆ One Chip Select plus one Output Enable pin ◆ Bidirectional data inputs and outputs directly LVTTL-compatible ◆ Low power consumption via chip des

文件：210.22 Kbytes 页数：11 Pages

RENESAS

瑞萨