36M-BIT QDRII SRAM 2-WORD BURST OPERATION

文件：357.7 Kbytes 页数：32 Pages

NEC

瑞萨

36M-BIT QDRII SRAM 2-WORD BURST OPERATION

Renesas

瑞萨

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (13 x 15) • HSTL interface • PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports with concurrent transactions • 100 bus utilization DDR READ and WRITE operation

文件：587.99 Kbytes 页数：42 Pages

RENESAS

瑞萨

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (13 x 15) • HSTL interface • PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports with concurrent transactions • 100 bus utilization DDR READ and WRITE operation

文件：587.99 Kbytes 页数：42 Pages

RENESAS

瑞萨

MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (13 x 15) • HSTL interface • PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports with concurrent transactions • 100 bus utilization DDR READ and WRITE operation

文件：587.99 Kbytes 页数：42 Pages

RENESAS

瑞萨

36M-BIT QDRII SRAM 2-WORD BURST OPERATION

文件：357.7 Kbytes 页数：32 Pages

NEC

瑞萨

36M-BIT QDRII SRAM 2-WORD BURST OPERATION

文件：357.7 Kbytes 页数：32 Pages

NEC

瑞萨