SY10H607中文资料Translators Products数据手册Microchip规格书

描述 Description

The SY10/100H607 are 6-bit, registered, dual supply PECL-to-TTL translators. The devices feature differential PECL inputs for both data and clock. The TTL outputs feature 48mA sink, 15mA source drive capability for driving high fanout loads. The asynchronous master reset control is a PECL level input.With its differential PECL inputs and TTL outputs, the H607 device is ideally suited for the receive function of a HPPI bus-type board-to-board interface application. The on-chip registers simplify the task of synchronizing the data between the two boards.The device is available in either ECL standard: the 10H device is compatible with 10K logic levels, while the 100H device is compatible with 100K logic levels.

特性 Features

·Differential PECL data and clock inputs
·48mA sink, 15mA source TTL outputs
·Single +5V power supply
·Multiple power and ground pins to minimize noise
·Specified within-device skew
·VBB output for single-ended use
·Fully compatible with MC10H/100H607
·Available in 28-pin PLCC package

简介

SY10H607属于集成电路（IC）的转换器电平移位器。由制造生产的SY10H607转换器，电平移位器逻辑转换器或电平移位器 IC 可用于在数字逻辑设备之间传递信息，这些设备可在不同/不兼容的供电电压下工作，或可实现不同的信令方式。例如，可以将需要 5 V 电源的数字输出传感器连接到具有 3.3 V I/O 电源的 FPGA，或者在 CMOS 或 TTL 等单端信令方式与 PECL 或 LVDS 等差分技术之间进行转换。