SY10EP52中文资料Flip Flops, Registers Products数据手册Microchip规格书

描述 Description

The SY10EP52V is a differential data, differential clock D flip-flop. The device is functionally equivalent to the EL52 device.Data enters the master portion of the flip-flop when CLK is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the CLK. The differential clock inputs of the EP52V allow the device to be used as a negative edge triggered flip-flop.The EP52V employs input clamping circuitry so that under open input condition (pulled down to VEE) the outputs of the device will remain stable.

特性 Features

·Guaranteed maximum frequency >4GHz
·Guaranteed <410ps propagation delay over temperature
·3.3V and 5V power supply options
·75Ω internal input pulldown resistor
·Wide operating temperature range: –40°C to +85°C
·Available in 8-pin (3mm) MSOP and SOIC package

简介

SY10EP52属于集成电路（IC）的触发器。由制造生产的SY10EP52触发器触发器是能够存储单个逻辑状态或信息“位”的基本数字存储器件。这些器件至少有两个输入；一个或多个用于传递要存储的数据，另一个用于指示存储该数据的时间点。不同的触发器类型，例如 D（延迟）、SR（置位复位）和 JK，对提供给其输入的信号有不同的响应，可用于实现不同的逻辑功能。这些器件与锁存器的不同之处在于它们是边缘敏感器件，其保持的逻辑状态仅在接收到有效时钟信号时才会改变。