SY10ELT21中文资料Translators Products数据手册Microchip规格书

描述 Description

The SY10/100ELT21 are single differential PECL-to-TTL translators. Because PECL (Positive ECL) levels are used, only +5V and ground are required. The small outline 8-lead SOIC package and low skew single gate design make the ELT21 ideal for applications that require the translation of a clock or data signal where minimal space, low power, and low cost are critical.The VBB output allow differential single-ended, or ACcoupled interface to the device. If used, the VBB output should be bypassed to VCC with a 0.01µF capacitor.The ELT21 is available in both ECL standards: the 10ELT is compatible with positive ECL 10H logic levels, while the 100ELT is compatible with positive ECL 100K logic levels.

特性 Features

·2.5ns typical propagation delay
·Low power
·Differential PECL inputs
·24mA TTL outputs
·Flow-through pinouts
·Available in 8-pin SOIC package
·

简介

SY10ELT21属于集成电路（IC）的转换器电平移位器。由制造生产的SY10ELT21转换器，电平移位器逻辑转换器或电平移位器 IC 可用于在数字逻辑设备之间传递信息，这些设备可在不同/不兼容的供电电压下工作，或可实现不同的信令方式。例如，可以将需要 5 V 电源的数字输出传感器连接到具有 3.3 V I/O 电源的 FPGA，或者在 CMOS 或 TTL 等单端信令方式与 PECL 或 LVDS 等差分技术之间进行转换。