SY100E457中文资料Multiplexers Products数据手册Microchip规格书

描述 Description

The SY10/100E457 are 3-bit differential 2:1 multiplexers. The fully differential data path makes the devices ideal for multiplexing low skew clock or other skew sensitive signals. Multiple VBB pins are provided to ease AC coupling input signals.The higher frequency outputs provide the device with a <1.0GHz bandwidth to meet the needs of the most demanding system clock.Both separate selects and a common select are provided to make the device well suited for both data path and random logic applications.

特性 Features

·Differential D and Q
·Extended 100E VEE range of –4.2V to –5.5V
·VBB output for single-ended use
·700ps max. propagation delay
·High frequency outputs
·Separate and common select
·Internal 75KΩ input pulldown resistors
·Available in 28-pin PLCC package

简介

SY100E457属于集成电路（IC）的信号开关多路复用器解码器。由制造生产的SY100E457信号开关，多路复用器，解码器逻辑型信号开关、多路复用器和编码器 IC 可用于对以数字格式表示数据的电信号进行路由和选择。这些器件与设计用于模拟信号的类似产品有所不同，它们保留的信息表示为两个电状态之一，而不是两个外部界限内的无穷变化量。