SY100E222L数据手册集成电路（IC）的时钟发生器PLL频率合成器规格书PDF

描述 Description

The SY100E222L is a low-skew, low-jitter device capable of receiving a high-speed LVECL/LVPECL input in either a single-ended or differential configuration. For single-ended configurations, a VBB output reference is supplied by the SY100E222L. A 2:1 input multiplexer selects from two differential input pairs by means of the CLK_SEL input select.The internal programmable divider for each of the four banks generates a ÷1 or ÷2 frequency of the selected input. The ÷1/÷2 divider outputs can be asynchronously synchronized with the master reset (MR) input so that the outputs will start out in a known state.The 15 total outputs are partitioned into four independently selected output banks in a 2/3/4/6 fanout configuration. Each of the four banks can independently select the ÷1 or ÷2 output frequency by means of the four separate frequency select pins (FSELA-FSELD) inputs.The SY100E222L is pin-for-pin compatible with the MC100LVE222FA device.The SY100E222L is part of a Micrel’s Precision Edge® product family. For other integrated clock divider plus fanout buffer options, consider Micrel’s SY89200 family.

特性 Features

• Four programmable output banks and 15 total LVPECL-compatible differential outputs
• Pin-compatible, plug-in replacement to MC100LVE222FA
• fMAX clock = 1.5GHz
• 50ps output-to-output skew
• Four output banks with independent ÷1, ÷2 frequency control
• 100k compatible I/O
• Power supply 3.3V ±10%
• –40°C to +85°C temperature range
• Available in 52-pin LQFP package

简介

SY100E222L属于集成电路（IC）的时钟发生器PLL频率合成器。由制造生产的SY100E222L时钟发生器，PLL，频率合成器时钟发生器、PLL 和频率合成器集成电路 (IC) 可为逻辑器件提供参考信号的稳定定时脉冲，这些器件包括计算机、微控制器、数据通信系统和图形/视频发生器。这些集成电路可能包括缓冲器、驱动器、分频器、倍频器、多路复用器、合成器、扇出分配器和预分频器。