SY100E310L数据手册集成电路（IC）的时钟缓冲器驱动器规格书PDF

描述 Description

The SY100E310L is a 3.3V, precision 2:8 ECL/PECL fanout buffer optimized for precision low-skew clock distribution. The SY100E310L features fully differential clock paths to minimize both device and system skew resulting in skew performance of <50ps. In addition, the device includes a 2:1 multiplexer input for redundant switchover applications.The SY100E310L is optimized for low voltage +3.3V LVPECL or –3.3V LVECL applications.

特性 Features

·Guaranteed AC performance over temperature and voltage:·>800MHz fMAX (typical)
·<50ps within-device skew

·Low voltage operation:·LVPECL: +3.3V ±10%
·LVECL: –3.3V ±10%

·Internal 75kΩ pull-down resistors
·Guaranteed over industrial temperature range: –40°C to +85°C
·Pin-for-pin, plug-in replacement for MC100LVE310
·Available in 28-pin PLCC package

简介

SY100E310L属于集成电路（IC）的时钟缓冲器驱动器。由制造生产的SY100E310L时钟缓冲器，驱动器时钟缓冲器和驱动器集成电路产品族中的产品用于帮助信号在系统中传输，常用作频率/时间参考信号，以同步系统内的活动。尽管这些器件最常用到的功能就是缓冲（即，为使信号不受驱动负载的影响而从某个信号源复制信号），但是该产品族中的某些器件还能执行其他功能，例如选择性改变缓冲信号路径、按某个整数值分割信号频率，或进行所用电信号格式转换。