1.8 V 28-bit 1 : 2 registered buffer with parity for DDR2-667 RDIMM applications

文件：160.58 Kbytes 页数：29 Pages

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1.8 V 28-bit 1 : 2 registered buffer with parity for DDR2-667 RDIMM applications

文件：160.58 Kbytes 页数：29 Pages

恩XP

1.8 V 28-bit 1 : 2 registered buffer with parity for DDR2-667 RDIMM applications

文件：160.58 Kbytes 页数：29 Pages

恩XP

1.8 V 28-bit 1 : 2 registered buffer with parity for DDR2-667 RDIMM applications

文件：160.58 Kbytes 页数：29 Pages

恩XP

1.8 V 28-bit 1 : 2 registered buffer with parity for DDR2-667 RDIMM applications

OverviewThe SSTUA32S865 is a 1.8 V 28-bit 1 : 2 register specifically designed for use on two rank by four (2R x 4) and similar high-density Double Data Rate 2 (DDR2) memory modules. It is similar in function to the JEDEC-standard 14-bit DDR2 register, but integrates the functionality of the normall \n\n•28-bit data register supporting DDR2\n\n•Fully compliant to JEDEC standard for SSTUA32S865\n\n•Supports 2 rank by 4 DIMM density by integrating equivalent functionality of two JEDEC-standard DDR2 registers (that is, 2 x SSTUA32864 or 2 x SSTUA32866)\n\n•Parity checking function across 22 input ;

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