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SN74ABT827DW

丝印:ABT827;Package:SOIC;10-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

State-of-the-Art EPIC-ΙΙB BiCMOS Design Significantly Reduces Power Dissipation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce)

文件:519.58 Kbytes 页数:19 Pages

TI

德州仪器

SN74ABT827DW

10-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

State-of-the-Art EPIC-ΙΙB BiCMOS Design Significantly Reduces Power Dissipation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce)

文件:519.94 Kbytes 页数:19 Pages

TI

德州仪器

SN74ABT827DW

10-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

文件:896.49 Kbytes 页数:17 Pages

TI

德州仪器

SN74ABT827DW

10-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

文件:399.74 Kbytes 页数:16 Pages

TI

德州仪器

SN74ABT827DW.B

丝印:ABT827;Package:SOIC;10-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

State-of-the-Art EPIC-ΙΙB BiCMOS Design Significantly Reduces Power Dissipation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce)

文件:519.58 Kbytes 页数:19 Pages

TI

德州仪器

SN74ABT827DW.B

10-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

State-of-the-Art EPIC-ΙΙB BiCMOS Design Significantly Reduces Power Dissipation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce)

文件:519.94 Kbytes 页数:19 Pages

TI

德州仪器

SN74ABT827DWR

10-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

State-of-the-Art EPIC-ΙΙB BiCMOS Design Significantly Reduces Power Dissipation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce)

文件:519.94 Kbytes 页数:19 Pages

TI

德州仪器

SN74ABT827DWR

丝印:ABT827;Package:SOIC;10-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

State-of-the-Art EPIC-ΙΙB BiCMOS Design Significantly Reduces Power Dissipation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce)

文件:519.58 Kbytes 页数:19 Pages

TI

德州仪器

SN74ABT827DWR.B

丝印:ABT827;Package:SOIC;10-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

State-of-the-Art EPIC-ΙΙB BiCMOS Design Significantly Reduces Power Dissipation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce)

文件:519.58 Kbytes 页数:19 Pages

TI

德州仪器

SN74ABT827DWR.B

10-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

State-of-the-Art EPIC-ΙΙB BiCMOS Design Significantly Reduces Power Dissipation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce)

文件:519.94 Kbytes 页数:19 Pages

TI

德州仪器

产品属性

  • 产品编号:

    SN74ABT827DW

  • 制造商:

    Texas Instruments

  • 类别:

    集成电路(IC) > 缓冲器,驱动器,接收器,收发器

  • 系列:

    74ABT

  • 包装:

    管件

  • 逻辑类型:

    缓冲器,非反向

  • 每个元件位数:

    10

  • 输出类型:

    三态

  • 电流 - 输出高、低:

    32mA,64mA

  • 电压 - 供电:

    4.5V ~ 5.5V

  • 工作温度:

    -40°C ~ 85°C(TA)

  • 安装类型:

    表面贴装型

  • 封装/外壳:

    24-SOIC(0.295",7.50mm 宽)

  • 供应商器件封装:

    24-SOIC

  • 描述:

    IC BUF NON-INVERT 5.5V 24SOIC

供应商型号品牌批号封装库存备注价格
TI
25+
SO24
22412
正规渠道,免费送样。支持账期,BOM一站式配齐
询价
TI
24+
250
询价
TI
23+
SOP24
5000
原装正品,假一罚十
询价
TEXASINSTRU
24+
原厂封装
8881
原装现货假一罚十
询价
TexasInstruments
18+
ICBUFF/DVRTRI-ST10BIT24S
6800
公司原装现货/欢迎来电咨询!
询价
Texas Instruments
24+
24-SOIC
65200
一级代理/放心采购
询价
TI
25+
SOP-24
325
就找我吧!--邀您体验愉快问购元件!
询价
TI(德州仪器)
2021+
SOIC-24
499
询价
TI/德州仪器
23+
SOP-24
50000
全新原装正品现货,支持订货
询价
TI
22+
24SOIC
9000
原厂渠道,现货配单
询价
更多SN74ABT827DW供应商 更新时间2026-2-3 14:59:00