SN74ABT827DW集成电路（IC）的缓冲器驱动器接收器收发器规格书PDF中文资料

SN74ABT827DW属于集成电路（IC）的缓冲器驱动器接收器收发器。由德州仪器制造生产的SN74ABT827DW缓冲器，驱动器，接收器，收发器逻辑缓冲器、驱动器、接收器和收发器允许隔离对某个电路的逻辑信号的访问，以用于另一电路。缓冲器将其输入信号（不变或反相）传递到其输出，并可能用于清除弱信号或驱动负载。在布尔逻辑仿真器中，缓冲器主要用于增加传播延迟。逻辑接收器和收发器允许在数据总线之间进行隔离通信。

State-of-the-Art EPIC-ΙΙB BiCMOS Design

Significantly Reduces Power Dissipation

Flow-Through Architecture Optimizes PCB

Layout

Latch-Up Performance Exceeds 500 mA Per

JEDEC Standard JESD-17

Typical VOLP (Output Ground Bounce) < 1 V

at VCC = 5 V, TA = 25°C

High-Impedance State During Power Up

and Power Down

High-Drive Outputs (−32-mA IOH, 64-mA IOL)

Package Options Include Plastic

Small-Outline (DW), Shrink Small-Outline

DB), and Thin Shrink Small-Outline (PW)

Packages, Ceramic Chip Carriers (FK), and

Plastic (NT) and Ceramic (JT) DIPs

description

These 10-bit buffers or bus drivers provide a

high-performance bus interface for wide data

paths or buses carrying parity.

The 3-state control gate is a 2-input AND gate with

active-low inputs so that, if either output-enable

(OE1 or OE2) input is high, all ten outputs are in

the high-impedance state. The ’ABT827 provides

true data at the outputs.

When VCC is between 0 and 2.1 V, the device

is in the high-impedance state during power up

or power down. However, to ensure

the high-impedance state above 2.1 V, OE should

be tied to VCC through a pullup resistor; the

minimum value of the resistor is determined by

the current-sinking capability of the driver.

The SN54ABT827 is characterized for operation over the full military temperature range of −55°C to 125°C. The

SN74ABT827 is characterized for operation from −40°C to 85°C.