S3N

Marking：S3N；Package：DO-214AB；General-Purpose Rectifiers

Features Low−ProfilePackage Glass−PassivatedJunction ULFlammabilityClassification:94V−0 ULCertified,UL#E258596 ThesearePb−FreeDevices

S-CSM360A

Marking：S36；Package：DO-214AC；Schottky Barrier Rectifiers Reverse Voltage 60V Forward Current 3.0A

FEATURES *PlasticpackagehasUnderwritersLaboratory FlammabilityClassification94V-0 *Lowpowerloss,highefficiency *Foruseinlowvoltagehighfrequencyinverters, freewheeling,andpolarityprotectionapplications *Guardringforovervoltageprotection *Hightemperaturesolderin

SKY13380-350LF

Marking：S380；20 MHz-3.0 GHz High Power SP4T Switch With Decoder

Applications •GSM/WCDMA/EDGEdatacardsandhandsets •Mobilehighpowerswitchingsystems Features •Broadbandfrequencyrange:20MHzto3.0GHz •Lowinsertionloss:0.40dB@1GHz,0.45dB@2GHzwithhighisolation(28dB@1GHz) •VDD:2.5to3.0Vforhighpowerapplications;can

SM33

Marking：S33；Package：SOT-23；2-Line Uni-directional TVS Diode Array

Features Protectsonetwouni-directionalline(s) Ultralowleakage:nAlevel Operatingvoltage:3.3V Lowclampingvoltage Complieswithfollowingstandards:–IEC61000-4-2(ESD)immunitytestAirdischarge:±30kVContactdischarge:±30kV–IEC61000-4-5(Lightning)23A(8/20μs) RoHSCompliant

SM36

Marking：S36；Package：SOT-23；2-Line Uni-directional TVS Diode Array

Features •300Wpeakpulsepower(8/20μs) •Protectstwouni-directionallines •Ultralowleakage:nAlevel •Operatingvoltage:36V •Lowclampingvoltage •Complieswithfollowingstandards:–IEC61000-4-2(ESD)immunitytestAirdischarge:±25kVContactdischarge:±20kV–IEC61000-4-5(Ligh

SN74S373DW

Marking：S373；Package：SOIC；OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS

ChoiceofEightLatchesorEightD-Type Flip-FlopsinaSinglePackage 3-StateBus-DrivingOutputs FullParallelAccessforLoading BufferedControlInputs Clock-EnableInputHasHysteresisto ImproveNoiseRejection(’S373and’S374) P-N-PInputsReduceDCLoadingonData Lines(’S373and

SN74S373DWR

Marking：S373；Package：SOIC；OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS

ChoiceofEightLatchesorEightD-Type Flip-FlopsinaSinglePackage 3-StateBus-DrivingOutputs FullParallelAccessforLoading BufferedControlInputs Clock-EnableInputHasHysteresisto ImproveNoiseRejection(’S373and’S374) P-N-PInputsReduceDCLoadingonData Lines(’S373and

SN74S374DW

Marking：S374；Package：SOIC；OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS

ChoiceofEightLatchesorEightD-Type Flip-FlopsinaSinglePackage 3-StateBus-DrivingOutputs FullParallelAccessforLoading BufferedControlInputs Clock-EnableInputHasHysteresisto ImproveNoiseRejection(’S373and’S374) P-N-PInputsReduceDCLoadingonData Lines(’S373and

SN74S374DWR

Marking：S374；Package：SOIC；OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS

ChoiceofEightLatchesorEightD-Type Flip-FlopsinaSinglePackage 3-StateBus-DrivingOutputs FullParallelAccessforLoading BufferedControlInputs Clock-EnableInputHasHysteresisto ImproveNoiseRejection(’S373and’S374) P-N-PInputsReduceDCLoadingonData Lines(’S373and

SN74S38D

Marking：S38；Package：SOIC；QUADRUPLE 2-INPUT POSITIVE-NAND BUFFERS WITH OPEN-COLLECTOR OUTPUTS

description Thesedevicescontainfourindependent2-inputNAND buffergateswithopen-collectoroutputs.Theopen- collectoroutputsrequirepull-upresistorstoperform correctly.Theymaybeconnectedtootheropen- collectoroutputstoimplementactive-lowwired-ORor active-highwired-A