16-bit Buffers / Line Drivers with 3-state Outputs

Description The RD74LVC16244B has sixteen line drivers with three state outputs in a 48 pin package. This device is a non inverting buffer and has two active low enables (1G to 4G). Each enable independently controls four buffers. Low voltage and high-speed operation is suitable at the battery dr

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16-bit Bus Transceivers with 3-state Outputs

Description The RD74LVC16245B has sixteen two direction buffers, for the fittest at two direction bus lines with three state outputs. A direction control input, DIR. When DIR is high, data flows from the A inputs to the B outputs. When DIR is low, data flows from the B inputs to the A outputs. Wh

文件：81.93 Kbytes 页数：8 Pages

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16-bit Bus Transceivers with 3-state Outputs

Description The RD74LVC16245B has sixteen two direction buffers, for the fittest at two direction bus lines with three state outputs. A direction control input, DIR. When DIR is high, data flows from the A inputs to the B outputs. When DIR is low, data flows from the B inputs to the A outputs. Wh

文件：81.93 Kbytes 页数：8 Pages

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16-bit D-type Transparent Latches with 3-state Outputs

Description The RD74LVC16373B has sixteen D type latches with three state outputs in a 48 pin package. When the latch enable input is high, the Q outputs will follow the D inputs. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns hig

文件：84.78 Kbytes 页数：10 Pages

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16-bit D-type Transparent Latches with 3-state Outputs

Description The RD74LVC16373B has sixteen D type latches with three state outputs in a 48 pin package. When the latch enable input is high, the Q outputs will follow the D inputs. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns hig

文件：84.78 Kbytes 页数：10 Pages

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16-bit D-type Flip Flops with 3-state Outputs

Description The RD74LVC16374B has sixteen edge trigger D type flip flops with three state outputs in a 48 pin package. Data at the D inputs meeting set up requirements are transferred to the Q outputs on positive going transitions of the clock input. When the latch enable goes low, data at the D

文件：80.21 Kbytes 页数：9 Pages

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16-bit D-type Flip Flops with 3-state Outputs

Description The RD74LVC16374B has sixteen edge trigger D type flip flops with three state outputs in a 48 pin package. Data at the D inputs meeting set up requirements are transferred to the Q outputs on positive going transitions of the clock input. When the latch enable goes low, data at the D

文件：80.21 Kbytes 页数：9 Pages

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Bus Buffer with 3-state Output

Description The RD74LVC1G125 has bus buffer with 3–state output in a 5-pin package. Low voltage and high-speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power consumption extends the battery life. Features • The basic gate function is lined u

文件：1.93231 Mbytes 页数：8 Pages

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Bus Buffer with 3-state Output

Description The RD74LVC1G125 has bus buffer with 3–state output in a 5-pin package. Low voltage and high-speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power consumption extends the battery life. Features • The basic gate function is lined u

文件：1.93231 Mbytes 页数：8 Pages

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Bus Buffer with 3-state Output

Description The RD74LVC1G126 has bus buffer with 3–state output in a 5-pin package. Low voltage and high-speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power consumption extends the battery life. Features • The basic gate function is lined u

文件：2.070909 Mbytes 页数：8 Pages

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