FRAME ENGINE AND DATA LINK MANAGER

DESCRIPTION The PM7366 FREEDM-8 Frame Engine and Datalink Manager device is a monolithic integrated circuit that implements HDLC processing, and PCI Bus memory management functions for a maximum of 128 bi-directional channels. FEATURES • Single-chip Peripheral Component Interconnect (PCI) Bus m

文件：2.2436 Mbytes 页数：286 Pages

PMC

FRAME ENGINE AND DATA LINK MANAGER

DESCRIPTION The PM7366 FREEDM-8 Frame Engine and Datalink Manager device is a monolithic integrated circuit that implements HDLC processing, and PCI Bus memory management functions for a maximum of 128 bi-directional channels. FEATURES • Single-chip Peripheral Component Interconnect (PCI) Bus m

文件：2.2436 Mbytes 页数：286 Pages

PMC

32 link, 32 Channel Data Link Manager with PCI Interface

DESCRIPTION The PM7367 FREEDM-32P32 Frame Engine and Datalink Manager device is a monolithic integrated circuit that implements HDLC processing, and PCI Bus memory management functions for a maximum of 32 bi-directional channels. FEATURES • Single-chip Peripheral Component Interconnect (PCI) Bu

文件：49.72 Kbytes 页数：4 Pages

PMC

ATM SAR and PHY Processor for PCI Bus

DESCRIPTION The PM7375 LASAR-155 Local ATM Segmentation and Reassembly & Physical Layer device is a monolithic integrated circuit that implements SONET/SDH transmission convergence, ATM cell mapping, ATM Adaptation Layer, and PCI Bus memory management functions for a 155.52 or 51.84 Mbit/s AT

文件：119.59 Kbytes 页数：4 Pages

PMC

FRAME ENGINE AND DATA LINK MANAGER 32P672

DESCRIPTION The PM7380 FREEDM-32P672 Frame Engine and Datalink Manager device is a monolithic integrated circuit that implements HDLC processing, and PCI Bus memory management functions for a maximum of 672 bi-directional channels. The FREEDM-32P672 may be configured to support H-MVIP, channelis

文件：2.52055 Mbytes 页数：2 Pages

PMC

FRAME ENGINE AND DATA LINK MANAGER 32P672

DESCRIPTION The PM7380 FREEDM-32P672 Frame Engine and Datalink Manager device is a monolithic integrated circuit that implements HDLC processing, and PCI Bus memory management functions for a maximum of 672 bi-directional channels. The FREEDM-32P672 may be configured to support H-MVIP, channelis

文件：2.52055 Mbytes 页数：2 Pages

PMC

32 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER WITH ANY-PHY PACKET INTERFACE

Frame Engine and Data Link Manager TYPICAL APPLICATIONS EIGHT LINK T1/E1 PORT ADAPTER FOR PPP PROCESSING N*DS3 FRAME RELAY TO ATM INTERWORKING

文件：1.95253 Mbytes 页数：2 Pages

PMC

32 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER WITH ANY-PHY PACKET INTERFACE

Frame Engine and Data Link Manager TYPICAL APPLICATIONS EIGHT LINK T1/E1 PORT ADAPTER FOR PPP PROCESSING N*DS3 FRAME RELAY TO ATM INTERWORKING

文件：1.95253 Mbytes 页数：2 Pages

PMC

Frame Engine and Data Link Manager 32P256

DESCRIPTION The PM7382 FREEDM-32P256 Frame Engine and Datalink Manager device is a monolithic integrated circuit that implements HDLC processing, and PCI Bus memory management functions for a maximum of 256 bi-directional channels. APPLICATIONS ● IETF PPP interfaces for routers ● TDM switches

文件：48.25 Kbytes 页数：4 Pages

PMC

FRAME ENGINE AND DATA LINK MANAGER 32A256

DESCRIPTION The PM7383 FREEDM-32A256 Frame Engine and Datalink Manager device is a monolithic integrated circuit that implements HDLC processing for a maximum of 256 bi-directional channels. The FREEDM-32A256 may be configured to support H-MVIP, channelised T1/J1/E1 or unchannelised traffic acro

文件：1.94719 Mbytes 页数：231 Pages

PMC