Quad Cell Delineation Block Device

FEATURES • Quad cell delineation device operating up to a maximum rate of 52 Mbit/s. • Provides a UTOPIA Level 2 compatible ATM-PHY Interface. • Implements the Physical Layer Convergence Protocol (PLCP) for DS1 transmission systems according to the ATM Forum User Network Interface Speci

文件：45.89 Kbytes 页数：4 Pages

PMC

Quad Cell Delineation Block Device

FEATURES • Quad cell delineation block operating up to a maximum rate of 52 Mbit/s. • Provides a UTOPIA Level 2- compatible ATM-PHY Interface. • Implements the Physical Layer Convergence Protocol (PLCP) for DS1 transmission systems according to the ATM Forum User Network Int

文件：35.68 Kbytes 页数：2 Pages

PMC

Quad Cell Delineation Block Device

FEATURES • Quad cell delineation block operating up to a maximum rate of 52 Mbit/s. • Provides a UTOPIA Level 2- compatible ATM-PHY Interface. • Implements the Physical Layer Convergence Protocol (PLCP) for DS1 transmission systems according to the ATM Forum User Network Int

文件：35.68 Kbytes 页数：2 Pages

PMC

S/UNI INVERSE MULTIPLEXING FOR ATM, 8 LINKS

DESCRIPTION The PM7340 S/UNI-IMA-8 is a monolithic integrated circuit that implements the Inverse Multiplexing for ATM (IMA 1.1) protocol with backward compatibility to IMA 1.0 and the Transmission Convergence (TC) layer function. FEATURES The PM7340 S/UNI-IMA-8 is a monolithic integrated circu

文件：2.79881 Mbytes 页数：334 Pages

PMC

S/UNI INVERSE MULTIPLEXING FOR ATM, 8 LINKS

DESCRIPTION The PM7340 S/UNI-IMA-8 is a monolithic integrated circuit that implements the Inverse Multiplexing for ATM (IMA 1.1) protocol with backward compatibility to IMA 1.0 and the Transmission Convergence (TC) layer function. FEATURES The PM7340 S/UNI-IMA-8 is a monolithic integrated circu

文件：2.79881 Mbytes 页数：334 Pages

PMC

S/UNI INVERSE MULTIPLEXING FOR ATM, 84 LINKS

DESCRIPTION The PM7341 S/UNI-IMA-84 is a monolithic integrated circuit that implements the Inverse Multiplexing for ATM (IMA 1.1) protocol with backward compatibility to IMA 1.0 and the Transmission Convergence (TC) layer function. The S/UNIIMA-84 has two line side interface modes that determine

文件：3.29117 Mbytes 页数：413 Pages

PMC

32 Link Inverse Multiplexer for ATM (IMA) / UNI PHY

FEATURES IMA • Supports up to 32 T1, E1, G.SHDSL or unchannelized links and up to 32 IMA groups with 1 to 32 links/group. • Link and Group State Machines implemented on-chip requiring no real time software in the data path. • Fully compliant with the ATM Forum Inverse Multiplexer for ATM (IMA)

文件：65.06 Kbytes 页数：2 Pages

PMC

SATURN QUAD T1/E1 MULTI-PHY USER NETWORK INTERFACE DEVICE

DESCRIPTION The PM7344 SATURN Quad T1/E1 Multi-PHY User Network Interface (S/UNIMPH) is a monolithic integrated circuit that implements the T1/E1 processing and ATM mapping functions for four 1.544 Mbit/s or 2.048 Mbit/s ATM User Network Interfaces. It can also be used in conjunction with externa

文件：1.14756 Mbytes 页数：293 Pages

PMC

SATURN User Network Interface for PDH Applications

DESCRIPTION The PM7345 S/UNI-PDH is an ATM physical layer processor with integrated DS3 and E3 framing. PLCP sublayer DS1, DS3, E1, and E3 processing is supported as is ATM cell delineation. FEATURES • Implements the ATM Direct Cell Mapping into DS1, DS3, E1, E3 transmission systems according t

文件：74.2 Kbytes 页数：2 Pages

PMC

SATURN QUAD USER NETWORK INTERFACE FOR J2, E3, T3

DESCRIPTION The PM7346 S/UNI-QJET is a quad ATM physical layer processor with integrated DS3, E3, and J2 framers. PLCP sublayer DS1, DS3, E1, and E3 processing is supported as is ATM cell delineation. The S/UNI-QJET contains integral DS3 framers, which provide DS3 framing and error accumulation

文件：2.53458 Mbytes 页数：419 Pages

PMC