74AUP1G79GV

Marking：p79；Package：SOT753；Low-power D-type flip-flop; positive-edge trigger

1.Generaldescription The74AUP1G79isasinglepositive-edgetriggeredD-typeflip-flop.DataattheD-inputthat meetstheset-upandholdtimerequirementsontheLOW-to-HIGHclocktransitionwillbestored intheflip-flopandappearattheQoutput..Schmitt-triggeractionatallinputsm

74AUP2G79DC

Marking：p79；Package：SOT765-1；Low-power dual D-type flip-flop; positive-edge trigger

1.Generaldescription The74AUP2G79providesthedualpositive-edgetriggeredD-typeflip-flop.Informationonthe datainput(nD)istransferredtothenQoutputontheLOW-to-HIGHtransitionoftheclockpulse (nCP).ThenDinputmustbestableoneset-uptimepriortotheLOW-to-HIGHclock

74AUP2G79GT

Marking：p79；Package：SOT833-1；Low-power dual D-type flip-flop; positive-edge trigger

1.Generaldescription The74AUP2G79providesthedualpositive-edgetriggeredD-typeflip-flop.Informationonthe datainput(nD)istransferredtothenQoutputontheLOW-to-HIGHtransitionoftheclockpulse (nCP).ThenDinputmustbestableoneset-uptimepriortotheLOW-to-HIGHclock

74AUP2G79DC-Q100

Marking：p79；Package：VSSOP8；Low-power dual D-type flip-flop; positive-edge trigger