NB7L86M中文资料2.5 V / 3.3 V, 12 Gb/s Differential Clock / Data Smart Gate with CML Output and Internal Termination数据手册ONSEMI规格书

描述 Description

The NB7L86M is a multi-function differential Logic Gate, whichcan be configured as an AND/NAND, OR/NOR, XOR/XNOR, or 2:1MUX. This device is part of the GigaComm family of highperformance Silicon Germanium products. The NB7L86M is anultra-low jitter multi-logic gate with a maximum data rate of 12 Gb/sand input clock frequency of 8 GHz suitable for Data CommunicationSystems, Telecom Systems, Fiber Channel, and GigE applications.The device is housed in a low profile 3x3 mm 16-pin QFN package.Differential inputs incorporate internal 50 Ω termination resistorsand accept LVNECL (Negative ECL), LVPECL (Positive ECL),LVCMOS, LVTTL, CML, or LVDS. The differential 16 mA CMLoutput provides matching internal 50 Ω termination, and 400 mVoutput swing when externally terminated 50 Ω to VCC.Application notes, models, and support documentation are availableon www.onsemi.com.

特性 Features

• Maximum Input Clock Frequency up to 8 GHz
• 30 ps Typical Rise and Fall Times
• 2 ps Typical Within Device Skew
• CML Output with Operating Range: VCC = 2.375 V to 3.465 V with VEE = 0 V
• 50 Ω Internal Input and Output Termination Resistors
• Pb-Free Packages are Available

应用 Application

• Data routing in Data Communication Systems, Telecom Systems, Fiber Channel, and GigE applications.
• Clock multiplexing for redundancy

简介

NB7L86M属于集成电路（IC）的门反相器-多功能可配置。由制造生产的NB7L86M门和反相器 - 多功能，可配置可配置逻辑栅极系列产品能以与标准逻辑栅极类似的方式，对单个逻辑信号执行基本逻辑运算，但并非局限于一个特定功能（例如 AND、NAND 等）。它们通常在内部使用少量逻辑门来实现，经过选择和互连后，以便通过选择操作数据所应用的输入以及任何未使用的输入在驱动后的逻辑状态，来配置所实现的整体逻辑功能。